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[23.128.96.18]) by mx.google.com with ESMTP id i14si5857358edt.120.2020.04.30.07.20.52; Thu, 30 Apr 2020 07:21:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726866AbgD3ORD (ORCPT + 99 others); Thu, 30 Apr 2020 10:17:03 -0400 Received: from sauhun.de ([88.99.104.3]:40398 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726743AbgD3ORC (ORCPT ); Thu, 30 Apr 2020 10:17:02 -0400 Received: from localhost (p5486CDDB.dip0.t-ipconnect.de [84.134.205.219]) by pokefinder.org (Postfix) with ESMTPSA id 865B62C08FC; Thu, 30 Apr 2020 16:17:01 +0200 (CEST) Date: Thu, 30 Apr 2020 16:17:01 +0200 From: Wolfram Sang To: ryan_chen Cc: Brendan Higgins , Benjamin Herrenschmidt , Joel Stanley , Andrew Jeffery , linux-i2c@vger.kernel.org, openbmc@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v0 linux master] i2c/busses: Avoid i2c interrupt status clear race condition. Message-ID: <20200430141701.GC3355@ninjato> References: <20200429033737.2781-1-ryan_chen@aspeedtech.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="1SQmhf2mF2YjsYvc" Content-Disposition: inline In-Reply-To: <20200429033737.2781-1-ryan_chen@aspeedtech.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --1SQmhf2mF2YjsYvc Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Apr 29, 2020 at 11:37:37AM +0800, ryan_chen wrote: > In AST2600 there have a slow peripheral bus between CPU > and i2c controller. > Therefore GIC i2c interrupt status clear have delay timing, > when CPU issue write clear i2c controller interrupt status. > To avoid this issue, the driver need have read after write > clear at i2c ISR. >=20 > Signed-off-by: ryan_chen Applied to for-current with a Fixes tag, thanks! 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