Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Venkateshwar Rao Gannavarapu <VGANNAVA@xilinx.com>
To:     Sam Ravnborg <sam@ravnborg.org>
CC:     Hyun Kwon <hyunk@xilinx.com>,
        "laurent.pinchart@ideasonboard.com" 
        <laurent.pinchart@ideasonboard.com>,
        "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>,
        Sandip Kothari <sandipk@xilinx.com>,
        "airlied@linux.ie" <airlied@linux.ie>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [RFC PATCH 1/2] dt-bindings: display: xlnx: Add Xilinx DSI TX
 subsystem bindings
Thread-Topic: [RFC PATCH 1/2] dt-bindings: display: xlnx: Add Xilinx DSI TX
 subsystem bindings
Thread-Index: AQHWF1mgtcGXqNzhbUWuhXXWg2URMqiKUbGAgAe4HxA=
Date:   Thu, 30 Apr 2020 18:36:16 +0000
Message-ID: <CH2PR02MB6871C64BB88CC9E00736C2E7B1AA0@CH2PR02MB6871.namprd02.prod.outlook.com>
References: <1587417656-48078-1-git-send-email-venkateshwar.rao.gannavarapu@xilinx.com>
 <1587417656-48078-2-git-send-email-venkateshwar.rao.gannavarapu@xilinx.com>
 <20200425202919.GA18024@ravnborg.org>
In-Reply-To: <20200425202919.GA18024@ravnborg.org>
Accept-Language: en-US
Content-Language: en-US
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: e50e9408-0769-4656-4296-08d7ed355e4a
X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Apr 2020 18:36:16.6153
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: lL/XSd53dUcwFOP0bDYmU7VURbe23QtVzM1N/Y9sBtF+xisSmYOmVuJHL3qplY2Xjaa8J/a/UKkUh8SWeJktzg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6053
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Hi Sam, thanks for your comments.

>-----Original Message-----
>From: Sam Ravnborg <sam@ravnborg.org>
>Sent: Sunday, April 26, 2020 1:59 AM
>To: Venkateshwar Rao Gannavarapu <VGANNAVA@xilinx.com>
>Cc: Hyun Kwon <hyunk@xilinx.com>; laurent.pinchart@ideasonboard.com; dri-
>devel@lists.freedesktop.org; Sandip Kothari <sandipk@xilinx.com>;
>airlied@linux.ie; linux-kernel@vger.kernel.org; Venkateshwar Rao Gannavara=
pu
><VGANNAVA@xilinx.com>
>Subject: Re: [RFC PATCH 1/2] dt-bindings: display: xlnx: Add Xilinx DSI TX
>subsystem bindings
>
>Hi Venkateshwar
>
>On Tue, Apr 21, 2020 at 02:50:55AM +0530, Venkateshwar Rao Gannavarapu
>wrote:
>> This add a dt binding for Xilinx DSI TX subsystem.
>>
>> The Xilinx MIPI DSI (Display serial interface) Transmitter Subsystem
>> implements the Mobile Industry Processor Interface (MIPI) based
>> display interface. It supports the interface with the programmable logic
>(FPGA).
>>
>> Signed-off-by: Venkateshwar Rao Gannavarapu
>> <venkateshwar.rao.gannavarapu@xilinx.com>
>> ---
>>  .../devicetree/bindings/display/xlnx/xlnx,dsi.txt  | 68
>> ++++++++++++++++++++++
>
>Sorry, but new bindings in DT Schema format (.yaml) please.
>We are working on migrating all bindings to DT Schema and do not want to a=
dd
>new bindings in the old format.
>
I will address bindings in YAML format in V2 patch.
>
>>  1 file changed, 68 insertions(+)
>>  create mode 100644
>> Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.txt
>>
>> diff --git
>> a/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.txt
>> b/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.txt
>> new file mode 100644
>> index 0000000..ef69729
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.txt
>> @@ -0,0 +1,68 @@
>> +Device-Tree bindings for Xilinx MIPI DSI Tx IP core
>> +
>> +The IP core supports transmission of video data in MIPI DSI protocol.
>> +
>> +Required properties:
>> + - compatible: Should be "xlnx-dsi".
>> + - reg: physical base address and length of the registers set for the d=
evice.
>> + - xlnx,dsi-num-lanes: Possible number of DSI lanes for the Tx controll=
er.
>> +   The values should be 1, 2, 3 or 4. Based on xlnx,dsi-num-lanes and
>> +   line rate for the MIPI D-PHY core in Mbps, the AXI4-stream received =
by
>> +   Xilinx MIPI DSI Tx IP core adds markers as per DSI protocol and the =
packet
>> +   thus framed is convered to serial data by MIPI D-PHY core. Please re=
fer
>> +   Xilinx pg238 for more details. This value should be equal to the num=
ber
>> +   of lanes supported by the connected DSI panel. Panel has to support =
this
>> +   value or has to be programmed to the same value that DSI Tx controll=
er is
>> +   configured to.
>> + - xlnx,dsi-datatype: Color format. The value should be one of
>> +"MIPI_DSI_FMT_RGB888",
>> +  "MIPI_DSI_FMT_RGB666", "MIPI_DSI_FMT_RGB666_PACKED" or
>"MIPI_DSI_FMT_RGB565".
>> + - #address-cells, #size-cells: should be set respectively to <1> and <=
0>
>> +   according to DSI host bindings (see MIPI DSI bindings [1])
>> + - clock-names: Must contain "s_axis_aclk" and "dphy_clk_200M" in same
>order as
>> +   clocks listed in clocks property.
>> + - clocks: List of phandles to Video and 200Mhz DPHY clocks.
>> + - port: Logical block can be used / connected independently with
>> +   external device. In the display controller port nodes, topology
>> +   for entire pipeline should be described using the DT bindings define=
d in
>> +   Documentation/devicetree/bindings/graph.txt.
>
>> + - simple_panel: The subnode for connected panel. This represents the
>> +   DSI peripheral connected to the DSI host node. Please refer to
>> +   Documentation/devicetree/bindings/display/mipi-dsi-bus.txt. The
>> +   simple-panel driver has auo,b101uan01 panel timing parameters added
>along
>> +   with other existing panels. DSI driver derive the required Tx IP con=
troller
>> +   timing values from the panel timing parameters.A
>Please always use either a port or a ports node.
>
OK.
>	Sam
>
>> +
>> +Required simple_panel properties:
>> + - compatible: Value should be one of the panel names in
>> +   Documentation/devicetree/bindings/display/panel/. e.g. "auo,b101uan0=
1".
>> +   For available panel compatible strings, please refer to bindings in
>> +   Documentation/devicetree/bindings/display/panel/
>> +
>> +Optional properties:
>> + - xlnx,dsi-cmd-mode: denotes command mode enable.
>> +
>> +[1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
>> +[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
>> +
>> +Example:
>> +
>> +       mipi_dsi_tx_subsystem@80000000 {
>> +               compatible =3D "xlnx,dsi";
>> +               reg =3D <0x0 0x80000000 0x0 0x10000>;
>> +               xlnx,dsi-num-lanes =3D <4>;
>> +               xlnx,dsi-data-type =3D <MIPI_DSI_FMT_RGB888>;
>> +               #address-cells =3D <1>;
>> +               #size-cells =3D <0>;
>> +               clock-names =3D "dphy_clk_200M", "s_axis_aclk";
>> +               clocks =3D <&misc_clk_0>, <&misc_clk_1>;
>> +               encoder_dsi_port: port@0 {
>> +                       reg =3D <0>;
>> +                       dsi_encoder: endpoint {
>> +                               remote-endpoint =3D <&xdsi_ep>;
>> +                       };
>> +               };
>> +               simple_panel: simple-panel@0 {
>> +                       compatible =3D "auo,b101uan01";
>> +                       reg =3D <0>;
>> +                       };
>> +               };
>> --
>> 2.7.4
>>
>> This email and any attachments are intended for the sole use of the name=
d
>recipient(s) and contain(s) confidential information that may be proprieta=
ry,
>privileged or copyrighted under applicable law. If you are not the intende=
d
>recipient, do not read, copy, or forward this email message or any attachm=
ents.
>Delete this email message and any attachments immediately.
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel