Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp745505ybz; Fri, 1 May 2020 07:49:27 -0700 (PDT) X-Google-Smtp-Source: APiQypJ9yBAkeN4szGHOLkMek+p4B9jt7vFVSDLDEAWWxYaEIVEK9fNnstk1babn4V9CRMWPpzwQ X-Received: by 2002:a17:906:3296:: with SMTP id 22mr3641563ejw.195.1588344567823; Fri, 01 May 2020 07:49:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588344567; cv=none; d=google.com; s=arc-20160816; b=r8lLQlNUxtGZ4JC39fkRfQNHg1JFVakyLBCOYuwt7kD1AzCkWJ/XQmxBt4nQsDP8e6 4pmzu0YpFv0+2Do8ZyDACSYM3JUCUfHgZOZrb+ndJ/iBBD6wIByOpCpQGyhUD3NY+d3X NnkTN4w8D83NGNvzdZ+J4P00vueR6/mzv5lA4pEi40QaKwjbFEzwcnye7vcCgsTEv059 ZRa69fvpkojHVbN+/7aY4tjNLqAFSPoI/c7Qyz8psledyGWxw39EyootPnyXk6n3Ka87 rET3rqohHQBqKnC4rnfwK47Y3ySS83ldker+YvnhI/SlHRYN0QGYHfkDY+pl7jz5iVnG 2FCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=VYcfqHBgzmpZji2WiZPbCnMrY+EvFPxU72mJtqnTPoo=; b=M8Ab1WF8JDpGhi93XsU/qLXGXbYzf7qamg+soiHlEP4Y+lrTkEhKRa8/rPcZrB7UlR FSfdu6GvEVuiAp3obyyQqNBC8lxz8m517e7iHTJZxjbV2KcTF6xFBcsQh1FbKQeLoJIw ILOkGOLuXS1k+6VrhltKbiPlZBADHsSdGcd2Xbpkp+F62Bj6l32nXG59KcdIJqnV6TI1 bsz2BUBo+lm9xinOO21qEA7XHDGSPO/IVNCfKc/TnPMsgosIVRBH0f1ep/chww0lhxPf hDWVGiiGgnPM611TyLvx0WrKUca/Xsf+QdK2QofHlXgfSx2+b5b1JTd1qjbNCUF4Yj5w lafQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q13si1884905edn.307.2020.05.01.07.49.04; Fri, 01 May 2020 07:49:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730164AbgEAOq6 (ORCPT + 99 others); Fri, 1 May 2020 10:46:58 -0400 Received: from foss.arm.com ([217.140.110.172]:41952 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729175AbgEAOqt (ORCPT ); Fri, 1 May 2020 10:46:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C94F31FB; Fri, 1 May 2020 07:46:48 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 895353F68F; Fri, 1 May 2020 07:46:47 -0700 (PDT) Date: Fri, 1 May 2020 15:46:45 +0100 From: Lorenzo Pieralisi To: Kishon Vijay Abraham I Cc: Tom Joseph , Bjorn Helgaas , Rob Herring , Andrew Murray , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robin.murphy@arm.com Subject: Re: [PATCH v2 2/4] PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" property Message-ID: <20200501144645.GB7398@e121166-lin.cambridge.arm.com> References: <20200417114322.31111-1-kishon@ti.com> <20200417114322.31111-3-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200417114322.31111-3-kishon@ti.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [+Robin - to check on dma-ranges intepretation] I would need RobH and Robin to review this. Also, An ACK from Tom is required - for the whole series. On Fri, Apr 17, 2020 at 05:13:20PM +0530, Kishon Vijay Abraham I wrote: > Cadence PCIe core driver (host mode) uses "cdns,no-bar-match-nbits" > property to configure the number of bits passed through from PCIe > address to internal address in Inbound Address Translation register. > > However standard PCI dt-binding already defines "dma-ranges" to > describe the address range accessible by PCIe controller. Parse > "dma-ranges" property to configure the number of bits passed > through from PCIe address to internal address in Inbound Address > Translation register. > > Signed-off-by: Kishon Vijay Abraham I > --- > drivers/pci/controller/cadence/pcie-cadence-host.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c > index 9b1c3966414b..60f912a657b9 100644 > --- a/drivers/pci/controller/cadence/pcie-cadence-host.c > +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c > @@ -206,8 +206,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) > struct device *dev = rc->pcie.dev; > struct platform_device *pdev = to_platform_device(dev); > struct device_node *np = dev->of_node; > + struct of_pci_range_parser parser; > struct pci_host_bridge *bridge; > struct list_head resources; > + struct of_pci_range range; > struct cdns_pcie *pcie; > struct resource *res; > int ret; > @@ -222,8 +224,15 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) > rc->max_regions = 32; > of_property_read_u32(np, "cdns,max-outbound-regions", &rc->max_regions); > > - rc->no_bar_nbits = 32; > - of_property_read_u32(np, "cdns,no-bar-match-nbits", &rc->no_bar_nbits); > + if (!of_pci_dma_range_parser_init(&parser, np)) > + if (of_pci_range_parser_one(&parser, &range)) > + rc->no_bar_nbits = ilog2(range.size); > + > + if (!rc->no_bar_nbits) { > + rc->no_bar_nbits = 32; > + of_property_read_u32(np, "cdns,no-bar-match-nbits", > + &rc->no_bar_nbits); > + } > > rc->vendor_id = 0xffff; > of_property_read_u16(np, "vendor-id", &rc->vendor_id); > -- > 2.17.1 >