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Sat, 02 May 2020 16:25:32 -0700 (PDT) Received: from syed ([106.210.101.167]) by smtp.gmail.com with ESMTPSA id g16sm5243374pfq.203.2020.05.02.16.25.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 02 May 2020 16:25:31 -0700 (PDT) Date: Sun, 3 May 2020 04:55:12 +0530 From: Syed Nayyar Waris To: William Breathitt Gray Cc: akpm@linux-foundation.org, andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, michal.simek@xilinx.com, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 4/4] gpio: xilinx: Utilize for_each_set_clump macro Message-ID: <20200502232512.GA31703@syed> References: <366a64f80ee9fe1c644ea038ac112ead9766d5c8.1588443578.git.syednwaris@gmail.com> <20200502190354.GA6513@shinobu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200502190354.GA6513@shinobu> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, May 02, 2020 at 03:03:54PM -0400, William Breathitt Gray wrote: > On Sun, May 03, 2020 at 12:21:54AM +0530, Syed Nayyar Waris wrote: > > This patch reimplements the xgpio_set_multiple function in > > drivers/gpio/gpio-xilinx.c to use the new for_each_set_clump macro. > > Instead of looping for each bit in xgpio_set_multiple > > function, now we can check each channel at a time and save cycles. > > > > Cc: Linus Walleij > > Cc: Bartosz Golaszewski > > Cc: Michal Simek > > Signed-off-by: Syed Nayyar Waris > > Signed-off-by: William Breathitt Gray > > --- > > Changes in v4: > > - Minor change: Hardcode value for better code readability. > > > > Changes in v3: > > - No change. > > > > Changes in v2: > > - No change. > > > > drivers/gpio/gpio-xilinx.c | 64 ++++++++++++++++++++------------------ > > 1 file changed, 34 insertions(+), 30 deletions(-) > > > > diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c > > index 67f9f82e0db0..67c5eeaf1bb9 100644 > > --- a/drivers/gpio/gpio-xilinx.c > > +++ b/drivers/gpio/gpio-xilinx.c > > @@ -136,39 +136,43 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) > > static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, > > unsigned long *bits) > > { > > - unsigned long flags; > > + unsigned long flags[2]; > > struct xgpio_instance *chip = gpiochip_get_data(gc); > > - int index = xgpio_index(chip, 0); > > - int offset, i; > > - > > - spin_lock_irqsave(&chip->gpio_lock[index], flags); > > - > > - /* Write to GPIO signals */ > > - for (i = 0; i < gc->ngpio; i++) { > > - if (*mask == 0) > > - break; > > - /* Once finished with an index write it out to the register */ > > - if (index != xgpio_index(chip, i)) { > > - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + > > - index * XGPIO_CHANNEL_OFFSET, > > - chip->gpio_state[index]); > > - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); > > - index = xgpio_index(chip, i); > > - spin_lock_irqsave(&chip->gpio_lock[index], flags); > > - } > > - if (__test_and_clear_bit(i, mask)) { > > - offset = xgpio_offset(chip, i); > > - if (test_bit(i, bits)) > > - chip->gpio_state[index] |= BIT(offset); > > - else > > - chip->gpio_state[index] &= ~BIT(offset); > > - } > > + u32 *const state = chip->gpio_state; > > + unsigned int *const width = chip->gpio_width; > > + const unsigned long state_size = 32; > > + const unsigned long total_state_bits = state_size * 2; > > Hello Syed, > > I don't think there's much need for these two variables either. You can > remove the state_size and total_state_bits variables, and instead inline > 32 and 64 directly in your code below. Hi. Have sent v5 patchset incorporating your review comment. Thank you. > > William Breathitt Gray > > > + unsigned long offset, clump; > > + size_t index; > > + > > + DECLARE_BITMAP(old, 64); > > + DECLARE_BITMAP(new, 64); > > + DECLARE_BITMAP(changed, 64); > > + > > + spin_lock_irqsave(&chip->gpio_lock[0], flags[0]); > > + spin_lock_irqsave(&chip->gpio_lock[1], flags[1]); > > + > > + bitmap_set_value(old, state[0], 0, width[0]); > > + bitmap_set_value(old, state[1], width[0], width[1]); > > + bitmap_replace(new, old, bits, mask, gc->ngpio); > > + > > + bitmap_set_value(old, state[0], 0, state_size); > > + bitmap_set_value(old, state[1], state_size, state_size); > > + state[0] = bitmap_get_value(new, 0, width[0]); > > + state[1] = bitmap_get_value(new, width[0], width[1]); > > + bitmap_set_value(new, state[0], 0, state_size); > > + bitmap_set_value(new, state[1], state_size, state_size); > > + bitmap_xor(changed, old, new, total_state_bits); > > + > > + for_each_set_clump(offset, clump, changed, total_state_bits, state_size) { > > + index = offset / state_size; > > + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + > > + index * XGPIO_CHANNEL_OFFSET, > > + state[index]); > > } > > > > - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + > > - index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]); > > - > > - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); > > + spin_unlock_irqrestore(&chip->gpio_lock[1], flags[1]); > > + spin_unlock_irqrestore(&chip->gpio_lock[0], flags[0]); > > } > > > > /** > > -- > > 2.26.2 > >