Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp2833845ybz; Sun, 3 May 2020 10:21:54 -0700 (PDT) X-Google-Smtp-Source: APiQypJaq+Fn73pWFQlNPdT4LMTkZBiJYWRCzHPk81rvktijtp3Gk2TYwK0iZVV4n2YJi3Yn61Rj X-Received: by 2002:aa7:dcc3:: with SMTP id w3mr11030997edu.231.1588526514392; Sun, 03 May 2020 10:21:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588526514; cv=none; d=google.com; s=arc-20160816; b=oFNqOxJ4pCEbi/T0i6mo3eKPnxPnKOIfX+PwyzZsbqY+rjy0WpxzBqMqD6Sps3ONPO 8OeACvOh8yFJ3pHQgjgGjHg/vmA78fVWUk2eFaGVaN0cIb4Hqm5mEeqxtBX5DkdDYE2h EqjgjSVqZclopjHLhK6wQmEkMSwRtUuA0MGW7ss8cqA5PWKymQKRZY/C3Eun3JO5KjuL xVYhcTyBcyY3+JC3SNhuypRcOa3EClIPnm7hewU5fkFd9hrdSPsPQSGoDx/CO/WA7wQr Ter4pkILtwQgdr03N1YEb0sgm7SWB8ZhJiNItjTwmUZ4ITZWKLVgBePan6awsm0Z9R1k 1WLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:content-transfer-encoding :mime-version:subject:from:message-id:date:dkim-signature; bh=ld8O9mcBv5GQEnlkZzjTUfZEYNj4PGm1CaR/MkS3lY0=; b=Gtw8ZYfgKsLYc2I7RprkVGreXs35PHMqQeBHXlFkh+K3PGCKRrIobaDcmJH/eDNVSe 4rfVUBBJ/PUMaZOGp1gTCibKTbhBtY5HQbc94XZBkJ6bNJ7DSwiP04v83KhlYtn+xdvF 8uzMkXjHrodXP36GOyntscB4RhTo3r85b0lLppet/pRyu6lI3kAwfbbiTwrQLgLHX78m tUOzBkF1+ShU0nOwR+eN187rvFn5KpzvgSU+sRPuo4SWXwWhHhojWOQC90/hBU5EZXY9 HqqM1xQs/+edmPyXL3iwvnfGiSQjpW9xUdsb0NTknLtaAGVKS+E61x0d95exHgmc+iup FkRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rere.qmqm.pl header.s=1 header.b=od9bfafI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u2si5876929edx.530.2020.05.03.10.21.18; Sun, 03 May 2020 10:21:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@rere.qmqm.pl header.s=1 header.b=od9bfafI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728915AbgECRT1 (ORCPT + 99 others); Sun, 3 May 2020 13:19:27 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:36778 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728852AbgECRT1 (ORCPT ); Sun, 3 May 2020 13:19:27 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 49FXlm1tRrzBc; Sun, 3 May 2020 19:19:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1588526365; bh=qcQYscDQASAGGq1qfnXT5pHuuM+wfGhJkYYXvoJsvpU=; h=Date:From:Subject:To:Cc:From; b=od9bfafI4fE+aETX9mRSeCMvhi1V9y75RE3umEUcAlesgbmLaUJMSdfsdxwXjueBV dOKMOTwOObMzN/0M1bkMfIvc4cIeiQQGQaiAzCY3fyV8+w68k+K6xSdhQyCwzf8hFU Jd/Jbwp2Vq3aR0zEkL5D3v/Tv4UwEIsqh0cfzLU4XgS6t3Df604INpiBjgbTSPDLtF wrHr6fDiA2xHrv+GLitZ4Gj2AFDAkaIC/bYFpYoqe6FnpoQr+YW5Lf4bCExZtITZlw QOtr5pxLzdsoaJX6uvlHXqHnKCoZKr/dvEvqzgEye90QbQdF465VUwFNI4astf323T wjIlBp/rTObrg== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Sun, 03 May 2020 19:19:15 +0200 Message-Id: From: =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= Subject: [PATCH v4 0/3] clk: at91: support configuring more clocks via DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To: Alexandre Belloni , Ludovic Desroches , Michael Turquette , Nicolas Ferre , Rob Herring , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series extends AT91 clock support with references to PCKx and PLLA/PLLB/AUDIOPLL. This makes the DT be able to fully specify (assign) clock parents when needed. First patch simplifies clock table allocation. Next two update the table with missing clock pointers and IDs. Michał Mirosław (3): clk: at91: optimize pmc data allocation clk: at91: allow setting PCKx parent via DT clk: at91: allow setting all PMC clock parents via DT drivers/clk/at91/at91rm9200.c | 12 ++++++--- drivers/clk/at91/at91sam9260.c | 13 +++++++--- drivers/clk/at91/at91sam9g45.c | 10 +++++--- drivers/clk/at91/at91sam9n12.c | 12 ++++++--- drivers/clk/at91/at91sam9rl.c | 10 +++++--- drivers/clk/at91/at91sam9x5.c | 10 +++++--- drivers/clk/at91/pmc.c | 44 ++++++++++++-------------------- drivers/clk/at91/pmc.h | 8 ++++-- drivers/clk/at91/sam9x60.c | 10 +++++--- drivers/clk/at91/sama5d2.c | 12 ++++++--- drivers/clk/at91/sama5d3.c | 10 +++++--- drivers/clk/at91/sama5d4.c | 10 +++++--- include/dt-bindings/clock/at91.h | 4 +++ 13 files changed, 106 insertions(+), 59 deletions(-) -- 2.20.1