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[23.128.96.18]) by mx.google.com with ESMTP id u19si6607348edd.364.2020.05.04.04.30.11; Mon, 04 May 2020 04:30:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728398AbgEDL1u (ORCPT + 99 others); Mon, 4 May 2020 07:27:50 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:55445 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727976AbgEDL1u (ORCPT ); Mon, 4 May 2020 07:27:50 -0400 Received: from mail-qk1-f171.google.com ([209.85.222.171]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPSA (Nemesis) id 1N5CMP-1j3YFF0wSr-011DFF for ; Mon, 04 May 2020 13:27:48 +0200 Received: by mail-qk1-f171.google.com with SMTP id i14so4852097qka.10 for ; Mon, 04 May 2020 04:27:48 -0700 (PDT) X-Gm-Message-State: AGi0PuZvXndvkmVdut3iGs0aopXJQvYMpBIXQIjJQlEOmI/Qrm5lyfYF 4IKWuhQquyXEsungG+06+NLvNQeB7iJ2M9uoM2E= X-Received: by 2002:a37:a492:: with SMTP id n140mr16289220qke.352.1588591667069; Mon, 04 May 2020 04:27:47 -0700 (PDT) MIME-Version: 1.0 References: <20200331093241.3728-1-tesheng@andestech.com> <20200408035118.GA1451@andestech.com> <20200414151748.GA5624@afzalpc> <20200415135407.GA6553@afzalpc> <20200503145017.GA5074@afzalpc> <20200504091018.GA24897@afzalpc> In-Reply-To: <20200504091018.GA24897@afzalpc> From: Arnd Bergmann Date: Mon, 4 May 2020 13:27:31 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 0/3] Highmem support for 32-bit RISC-V To: afzal mohammed Cc: Russell King , Alan Kao , Eric Lin , Gary Guo , alex@ghiti.fr, David Abdurachmanov , Anup Patel , "linux-kernel@vger.kernel.org" , Andrew Morton , Steven Price , atish.patra@wdc.com, yash.shah@sifive.com, Albert Ou , Palmer Dabbelt , Greentime Hu , zong.li@sifive.com, Paul Walmsley , Mike Rapoport , Thomas Gleixner , Borislav Petkov , Logan Gunthorpe , linux-riscv@lists.infradead.org, Linux ARM Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:h8TK6tTY8IJxPzp2xKXu8vHec7/caLMkY2RIP/P9mLMkxvHhpnV TNe/DZbrW75p+bANVWhmSdm6gFNckfZ1xt+sYhark9ua3PTFyc6uLmnIYEMm0zVAh5XToit snzAVVynsnbO/Xb06UEOtuuTGbXFUr8J7Ugp0vt47SM30oxRvMEMgjfl5UbQb4cqp5R7AKu E60a40gmC+5WkGMpUUJbA== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:41GJnzizHjA=:6G4P0KRSZ2watz0fMnPHg/ GBQWiNAt03J2AKbpF9rkhkNV1S6hMmptTR3S6ZnWfYLjJtoGPBc/A8PdBydod3gYyLKnmGWZ5 7x6ypjbgyMwXFnLb2OVNoaiPfsR41Mm8iqAeOQ3qShv7IR7DCtsGxAsVtxrfeeBWxM2yG2ilc nI/qsFdjpnfpuMx/WjWU7XJlAaTFh2Sc7S4VMzew8S0i18NmBjptOI1WK56SCMETCYFxmFERZ u8MEuPclhyD66pzxwP3V45bqPhuZi5sFISWJT0mIGBc9xlVvjWB8oLe1NCBJfg8mDduLbSBOC GzgHvDHOAA5rMEG6kwPiHdw1ew9HJOvhvBmxYQIcFNaHL2k1RhWouxsQQeqW90fHyK4xkbsuZ OgY6fIpSJK90QPumlE7BZgZx1DTE0fnR1Hw/5QQGBO2osL2JmnVE4bKFqdpQ1D/gOmgn/fxc/ Fxymm6VQwjkHN0sEWDn2OSeLRnjq21EX2adZBIw1OzB2W0fSpF+LtOrqjnIk/x+Zrn08zsg6F wY4IK1pWQgUlVxbPFqI0aYUVi/9LOgGDG/wzDjqT8x72waAH+pkJulJRLdm/dWcgQYaX8SKsD dQTXvbWKzV0drzViT5biWe+TETLThTB2Zc3kDBuah2ZrV3kbt1yVDJsSf5Y3WCucj6+5fRSCV 3SwAWN2h8Aql0xTYKko4aoTkB8BuCcWiSwqK/qHmLHf6OTrMPgLSp7JzHt1j49pBmaUwUnuDG CLUHmm+VcGRQnsXl/Chvo8cSGTh0XYKj5WVY6jqouqXpjiJrwqculzN9tlsxMwJO7KhJR8ezV jl7LNYEl4hwzdeEU954jiNpJ2d3P/MoneBXrk3Z0YKB7wLAF1Y= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 4, 2020 at 11:10 AM afzal mohammed wrote: > > [ +linux-arm-kernel > > Context: This is regarding VMSPLIT_4G_4G support for 32-bit ARM as a > possible replacement to highmem. For that, initially, it is being > attempted to move static kernel mapping from lowmem to vmalloc space. > > in next reply, i will remove everyone/list !ARM related ] > > Hi, > > On Sun, May 03, 2020 at 10:20:39PM +0200, Arnd Bergmann wrote: > > > Which SoC platform are you running this on? Just making > > sure that this won't conflict with static mappings later. > > Versatile Express V2P-CA15 on qemu, qemu options include --smp 2 & > 2GB memory. Ok > BTW, i could not convince myself why, except for DEBUG_LL, static io > mappings are used. I don't think vexpress uses it, but others have some 'struct map_desc' instances mostly for historic reasons, e.g. to map some registers that are needed at very early boot time, or from assembler files. > > One problem I see immediately in arm_memblock_init() > > Earlier it went past arm_memblock_init(), issue was clearing the page > tables from VMALLOC_START in devicemaps_init() thr' paging_init(), > which was like cutting the sitting branch of the tree. > > Now it is crashing at debug_ll_io_init() of devicemap_init(), and > printascii/earlycon was & is being used to debug :). Things are going > wrong when it tries to create mapping for debug_ll. It looks like a > conflict with static mapping, which you mentioned above, at the same > time i am not seeing kernel static mapping in the same virtual > address, need to dig deeper. > > Also tried removing DEBUG_LL, there is a deafening silence in the > console ;) I don't think there is any other mapping that would conflict with the DEBUG_LL one, but you may be in a hole where the existing one is not mapped. IIRC it first gets mapped in __create_page_tables() in arch/arm/kernel/head.S, and later in debug_ll_io_init(), but if the old page tables were just discarded, it won't work for a bit. Using gdb to step through the code in qemu is often more reliable than printing to the console, at least until you get to the point when you have registered the real console. > __virt_to_phys_nodebug() which does the actual work on __pa() invocation > has been modifed to handle that case (ideas lifted from ARM64's > implementation), though currently it is a hack as below (and applicable > only for ARM_PATCH_PHYS_VIRT disabled case), other hacks being > VMALLOC_OFFSET set to 0 and adjusting vmalloc size. > > static inline phys_addr_t __virt_to_phys_nodebug(unsigned long x) > { > phys_addr_t __x = (phys_addr_t)x; > > if (__x >= 0xf0000000) > return __x - KIMAGE_OFFSET + PHYS_OFFSET; > else > return __x - PAGE_OFFSET + PHYS_OFFSET; > } Ok, makes sense. Arnd