From: Andi Kleen <ak@suse.de>
To: "Bryan O'Sullivan" <bos@pathscale.com>
Subject: Re: [PATCH] Define flush_wc, a way to flush write combining store buffers
Date: Wed, 8 Mar 2006 15:38:31 +0100
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Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>, akpm@osdl.org,
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On Wednesday 08 March 2006 22:57, Bryan O'Sullivan wrote:
> On Wed, 2006-03-08 at 15:21 +0100, Andi Kleen wrote:
> 
> > I think doing it privately is the better solution because I don't think you 
> > have established it has an universal semantic that works
> > on all X86-64 systems.
> 
> No, I quoted chapter and verse of the relevant Intel and AMD x86_64 docs
> for you, complete with URLs and page numbers so it wouldn't take any
> effort to verify what I was asserting.
> 
> I don't know what else I could have done (it was enough for bcrl, at
> least), and you have come up any with suggestions as to what *would*
> satisfy you, so I'm stuck.

Hmm, I reread the thread and with the "i don't need a flush, just ordering" 
part of your description it makes sense.

My second objection still stands though. Maybe we should add this as
part of a generic portable PAT/WC infrastructure. But isolated
it doesn't make sense.

-Andi
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