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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id p189sm9716682pfp.135.2020.05.04.13.01.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2020 13:01:28 -0700 (PDT) Date: Mon, 04 May 2020 13:01:28 -0700 (PDT) X-Google-Original-Date: Mon, 04 May 2020 13:01:06 PDT (-0700) Subject: Re: [PATCH 0/3] RISC-V KVM preparation In-Reply-To: <20200424045928.79324-1-anup.patel@wdc.com> CC: Paul Walmsley , aou@eecs.berkeley.edu, pbonzini@redhat.com, Atish Patra , Alistair Francis , anup@brainfault.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel From: Palmer Dabbelt To: Anup Patel Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 23 Apr 2020 21:59:25 PDT (-0700), Anup Patel wrote: > This patch series is factored-out from the KVM RISC-V v11 series and is > based upon Linux-5.7-rc2. > > These patches are mostly preparatory changes in Linux RISC-V kernel which > we require for KVM RISC-V implementation. Also, most of these patches are > already reviewed as part of original KVM RISC-V series. > > Anup Patel (3): > RISC-V: Export riscv_cpuid_to_hartid_mask() API > RISC-V: Add bitmap reprensenting ISA features common across CPUs > RISC-V: Remove N-extension related defines > > arch/riscv/include/asm/csr.h | 3 -- > arch/riscv/include/asm/hwcap.h | 22 +++++++++ > arch/riscv/kernel/cpufeature.c | 83 ++++++++++++++++++++++++++++++++-- > arch/riscv/kernel/smp.c | 2 + > 4 files changed, 104 insertions(+), 6 deletions(-) These are on fixes.