Received: by 2002:a25:1985:0:0:0:0:0 with SMTP id 127csp3979896ybz; Mon, 4 May 2020 13:23:29 -0700 (PDT) X-Google-Smtp-Source: APiQypJzwtXg73qS/qXS48Fipi/Qfp4LBm488mcyQcM69uMiPc7j9UboXzGsWpJzoNW+bqLi6xL5 X-Received: by 2002:a50:e8cb:: with SMTP id l11mr17125491edn.174.1588623809162; Mon, 04 May 2020 13:23:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588623809; cv=none; d=google.com; s=arc-20160816; b=dOrAYsB7jI7DsNZ/Dfo1hCpVL4LvXSQFRTzB9TWtd3Azs100ok27tkpklRee4i2opf lzOlp/ODS+KoJiAATodG9I1I7FgbvcFWiPne4VAQdw93ez8uGrN9LJxAXHzl8jbUiHEq qmpPOmeJ8zpMTvok4RqlI4Lshk6kxDTwZscC6HYY3gK17M0HePiLUgM1oICbza1NUbkg Mc2vJ1EvTyduA9uQkfmEzUGoNN5WI5QJhs2N4WP3iN/Yx0Vs7iM5NdXxGRvMos4mQs/t t/EUGqDYdbgfUakKaPnZcJoafjmiJklu0VP9flI5eJesiyqN0IFcN8U8t004H1rc5PfG /k5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:content-transfer-encoding :mime-version:subject:from:message-id:date:dkim-signature; bh=ld8O9mcBv5GQEnlkZzjTUfZEYNj4PGm1CaR/MkS3lY0=; b=aL91E0GX6iQ8lboKRFQMwA6VQ2iTp0EcWTBf/GD1hTxAp//GNp4NwyK8m87xdtZ7ln rB5mLxmX/muRRIhiT1RJPgxakaZIwZpmoRdqIq+H2gwQmRvjwaoZ7zUVCCM4QSNP/zC4 yDVtNxnNVG1D9uazS2b5zEHtvGkB8I/bFJnvdEcuxviRIGzlsquf/VwLVTuk0rYSo2p9 VV7NaWvz87Vn8xUbl5iu/3yznrqX88wb+3yg5zAYHg3rM0hhkxOhVO+AGlAWuhUI0BjZ fggfQ+eULG/6FLJKhK6ZPHGwOX5hkuPV+0UsZhro9QQK+uXJrSb6lyRNB0dathkLCWvk QUCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rere.qmqm.pl header.s=1 header.b=OMWOhZsj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q9si17059edn.501.2020.05.04.13.23.05; Mon, 04 May 2020 13:23:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@rere.qmqm.pl header.s=1 header.b=OMWOhZsj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727780AbgEDUTT (ORCPT + 99 others); Mon, 4 May 2020 16:19:19 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:34336 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726111AbgEDUTT (ORCPT ); Mon, 4 May 2020 16:19:19 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 49GDj11SK1zGl; Mon, 4 May 2020 22:19:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1588623557; bh=qcQYscDQASAGGq1qfnXT5pHuuM+wfGhJkYYXvoJsvpU=; h=Date:From:Subject:To:Cc:From; b=OMWOhZsjgMD0dtICo6Gxn1dfhSoW3AoL7g5Fy0jnwxrW97z9DXRHuqGg9/mPVs4iL 4ydpOesSxNGbnFc2WMuyj+Y645n3nuoPYqjJwbVRV+mHjYHWTb2udx4KQOAowKQltF A7un/+N6G7QMM+XRdZMUEOtJifmtplR8Eal46I7GbMprqOi0gPp0qbnx17h7hsLHkx Wp3ISCYP/v639xzile3FILkqSFswgwHBQZHV5Pyd017T9v7HmcnA8gOnmznl7G18VB UwkoWceaBUeHnaHH22q/sLjCRnJXfjLcgxAjybP5y+zUsrVxE1SopX2bWKU6c9w9D+ j3b+7BxyjG3Tg== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Mon, 04 May 2020 22:19:16 +0200 Message-Id: From: =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= Subject: [PATCH v6 0/3] clk: at91: support configuring more clocks via DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To: Alexandre Belloni , Ludovic Desroches , Michael Turquette , Nicolas Ferre , Rob Herring , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series extends AT91 clock support with references to PCKx and PLLA/PLLB/AUDIOPLL. This makes the DT be able to fully specify (assign) clock parents when needed. First patch simplifies clock table allocation. Next two update the table with missing clock pointers and IDs. Michał Mirosław (3): clk: at91: optimize pmc data allocation clk: at91: allow setting PCKx parent via DT clk: at91: allow setting all PMC clock parents via DT drivers/clk/at91/at91rm9200.c | 12 ++++++--- drivers/clk/at91/at91sam9260.c | 13 +++++++--- drivers/clk/at91/at91sam9g45.c | 10 +++++--- drivers/clk/at91/at91sam9n12.c | 12 ++++++--- drivers/clk/at91/at91sam9rl.c | 10 +++++--- drivers/clk/at91/at91sam9x5.c | 10 +++++--- drivers/clk/at91/pmc.c | 44 ++++++++++++-------------------- drivers/clk/at91/pmc.h | 8 ++++-- drivers/clk/at91/sam9x60.c | 10 +++++--- drivers/clk/at91/sama5d2.c | 12 ++++++--- drivers/clk/at91/sama5d3.c | 10 +++++--- drivers/clk/at91/sama5d4.c | 10 +++++--- include/dt-bindings/clock/at91.h | 4 +++ 13 files changed, 106 insertions(+), 59 deletions(-) -- 2.20.1