Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp40002ybj; Mon, 4 May 2020 15:39:42 -0700 (PDT) X-Google-Smtp-Source: APiQypKM9XE33S8jOAU42r27u+y2Ap2+fEkY+NoohKAQPjY8H2AJvENnsd+22NN+ssbE6pvECuhA X-Received: by 2002:a17:906:7f0d:: with SMTP id d13mr67387ejr.312.1588631982827; Mon, 04 May 2020 15:39:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588631982; cv=none; d=google.com; s=arc-20160816; b=K6xGHQXCf2pLD3R7vlFA48jGACBCxCvMmgK5Q/nNSpLHs8WX1zCLYPVTPJxx1TOrdv vr/xYorHn9d4scv2cg+X/MjKSQaZlljNgTPgDNLJKiZ/pb7ZUlQwNX4xVb07FQ+AwLBz cintFM+oWCAzBcnTtm9PP69gNTCrhxCoc8oaC/gAD2EUtYYyn3dCHiQDiKzo19/MzILq 532vKRN9kwECvcnvIMuk9vLzuMVLxIKS5/Nv6cOW3BSrChtYczonSRVQxVTBpweOIDJH NoNqQOKsbngbCp+3Xo31wgaRsDW2MJ20en2TJYxDU+aaj+gvyAoCu066b4mqXxS5dHKQ tZNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:content-transfer-encoding :mime-version:subject:from:message-id:date:dkim-signature; bh=ld8O9mcBv5GQEnlkZzjTUfZEYNj4PGm1CaR/MkS3lY0=; b=mTSL317dVhxqWvaMJV/+m1cpErBdsqJkgwGAUz3tWo7Dbrvl1o5z8oYPh50m9WFjKr f93UcQaOM+jBEklYSgeb74xYkCxWF9sbgSzp/R4eHIkwqVVIULKOanRvRuR7mPNhSgYm 2bVECKm4K97Euaxeo7Nyq8Z1rjWMgewx4KRVY2TJkcG/isJ5dkndol3erxYWtblQMVv4 ysUkIkqBBvDq7s24qC95ONxhwC/vX0J5IrXDxND5lwx/ePBoBEUROXsCN9wZJYODvSVG EtjLmvr6agWkkBzCffd4vQSOV7tsv6SHYnuTVqPQZv02fmDscTyvoZk5uk/a8uZWMycQ XI3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rere.qmqm.pl header.s=1 header.b=VZCoghIB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gr21si7030123ejb.482.2020.05.04.15.39.19; Mon, 04 May 2020 15:39:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@rere.qmqm.pl header.s=1 header.b=VZCoghIB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728157AbgEDWh6 (ORCPT + 99 others); Mon, 4 May 2020 18:37:58 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:56530 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726291AbgEDWh6 (ORCPT ); Mon, 4 May 2020 18:37:58 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 49GHn027BZz8r; Tue, 5 May 2020 00:37:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1588631876; bh=qcQYscDQASAGGq1qfnXT5pHuuM+wfGhJkYYXvoJsvpU=; h=Date:From:Subject:To:Cc:From; b=VZCoghIBoeoMhFPrQf0kXhVMMWab6ZYGQo7bVWHNzBPGpKGTv8WxKBOgozXCJqUyA trN0BkWoqdWSuz9pUhgoH84aE5D6lHqkwzKU2IBFpZ9iGq4CAqJsqUT8JQucr2XJYN VPTpOavoFhlldfLi8UJwei6RSoHULNhfDAzswotYkobJJzI2qu+ticWmT1Ic4l06Pf vAC2ztybbUx/LbYJne5x+/EWBRLYufvcIOJDr5FJ6ck+8J4f44HBc7oAJtsZVSJGbk +Zz+6Ziy8gtKcm6b75TGXZuz6RdV/iALVACy4DWGWmEJGblzooS574x36KwviX2yiH GtkR2O381goVg== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Tue, 05 May 2020 00:37:56 +0200 Message-Id: From: =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= Subject: [PATCH v7 0/3] clk: at91: support configuring more clocks via DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To: Alexandre Belloni , Ludovic Desroches , Michael Turquette , Nicolas Ferre , Rob Herring , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series extends AT91 clock support with references to PCKx and PLLA/PLLB/AUDIOPLL. This makes the DT be able to fully specify (assign) clock parents when needed. First patch simplifies clock table allocation. Next two update the table with missing clock pointers and IDs. Michał Mirosław (3): clk: at91: optimize pmc data allocation clk: at91: allow setting PCKx parent via DT clk: at91: allow setting all PMC clock parents via DT drivers/clk/at91/at91rm9200.c | 12 ++++++--- drivers/clk/at91/at91sam9260.c | 13 +++++++--- drivers/clk/at91/at91sam9g45.c | 10 +++++--- drivers/clk/at91/at91sam9n12.c | 12 ++++++--- drivers/clk/at91/at91sam9rl.c | 10 +++++--- drivers/clk/at91/at91sam9x5.c | 10 +++++--- drivers/clk/at91/pmc.c | 44 ++++++++++++-------------------- drivers/clk/at91/pmc.h | 8 ++++-- drivers/clk/at91/sam9x60.c | 10 +++++--- drivers/clk/at91/sama5d2.c | 12 ++++++--- drivers/clk/at91/sama5d3.c | 10 +++++--- drivers/clk/at91/sama5d4.c | 10 +++++--- include/dt-bindings/clock/at91.h | 4 +++ 13 files changed, 106 insertions(+), 59 deletions(-) -- 2.20.1