Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp200342ybj; Mon, 4 May 2020 19:17:10 -0700 (PDT) X-Google-Smtp-Source: APiQypLDxS+IKc28drMW3By+azmfFftEma0tC6rBu0FN8LQVfy55/DrcNJ2bJsBuzhEc/pYfAs1P X-Received: by 2002:a17:906:55c4:: with SMTP id z4mr579140ejp.353.1588645030395; Mon, 04 May 2020 19:17:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588645030; cv=none; d=google.com; s=arc-20160816; b=bVPnKoKXdo5aioiIrQT0Q42rDhH7UuAQR3zImUlscPXX1NIhmKFsYjFZl+1gWoMpG0 eFUUmW7vINMpPRz6uei3XrAQfmKmTP1Rxd7ZWX8+LcuQcQWcnF00FhDCsndsFfARzRpd ulbIBYpeD2fcpkVefQrf+5SrplBPZCpuJ+ukTVHblVa7tm8RIBNi5/BIeErKgza3DRMR xI/a13sJ98B0j6AXti+FrbN4+pBfhcu1Q3SBEH484taWosnNfN9O5HqB/x7I7NbOT7ot Jp07f+a+vjqAH+PFRzbc+9hx/l6fsR692Q7hu6hSMgyX74ehCG32oX7JG55V2TmikTda KUVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:from:references:cc:to :subject; bh=zcj2PkVeYSc7oCNJiPLH9G+oLXRdELEyvDTghHsy2Jk=; b=iXphQvwbgQv2MMX4ax5AxlaXhhJuu+gZDtVCkWn3ELDipzleHmLlGFE4GRoQWvLxD7 fmpnN6WA2Rpi42KOiCcSGoICcJ7v6/glcSbV/XTgbXPraeTfFlQMFdgBnvtDCUwGL9UZ 07dRiC6Cb1LFvcD/Bh3fX8iZma7xknyDd686zF6arXklkVeUjcvBOtGKLxxB0c6Is/4f 71d/Wjmru6SmFk7CXyzKpt1oarYzocSCkxPOhz+refDonXZzIRSD6hNZ6Vi/W4XOdDGV mK5SaFvgj8ZJTq2GXy+Q1fNf/uN2kX6HNqzMV0LCF7iwRlB9lRoNM5Xuyn9c9ZPF2GbN W19A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n24si190794ejs.457.2020.05.04.19.16.47; Mon, 04 May 2020 19:17:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728137AbgEECNF (ORCPT + 99 others); Mon, 4 May 2020 22:13:05 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:46982 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726549AbgEECNF (ORCPT ); Mon, 4 May 2020 22:13:05 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 49DE07E1D44437D1473C; Tue, 5 May 2020 10:13:03 +0800 (CST) Received: from [127.0.0.1] (10.166.215.101) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Tue, 5 May 2020 10:12:55 +0800 Subject: Re: [RFC PATCH] cpufreq: add support for HiSilicon SoC HIP09 To: Sudeep Holla CC: , , , , , References: <1588227599-46438-1-git-send-email-wangxiongfeng2@huawei.com> <20200430095559.GB28579@bogus> From: Xiongfeng Wang Message-ID: <84181382-2daf-b05f-ec46-278c1d5fe8a8@huawei.com> Date: Tue, 5 May 2020 10:12:54 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200430095559.GB28579@bogus> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.166.215.101] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sudeep, Thanks for your reply. On 2020/4/30 17:55, Sudeep Holla wrote: > On Thu, Apr 30, 2020 at 02:19:59PM +0800, Xiongfeng Wang wrote: >> HiSilicon SoC has a separate System Control Processor(SCP) dedicated for >> clock frequency adjustment and has been using the cpufreq driver >> 'cppc-cpufreq'. New HiSilicon SoC HIP09 add support for CPU Boost, but >> ACPI CPPC doesn't support this. In HiSilicon SoC HIP09, each core has >> its own clock domain. It is better for the core itself to adjust its >> frequency when we require fast response. In this patch, we add a >> separate cpufreq driver for HiSilicon SoC HIP09. >> > > I disagree with this approach unless you have tried to extend the CPPC > in ACPI to accommodate this boost feature you need. Until you show those > efforts and disagreement to do that from ASWG, I am NACKing this approach. I will try to extend the CPPC to accommodate the CPU Boost feature. Thanks, Xiongfeng > > -- > Regards, > Sudeep > > . >