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Subject: Re: [PATCH] drm/amdgpu: allocate large structures dynamically
To:     Arnd Bergmann <arnd@arndb.de>,
        Alex Deucher <alexander.deucher@amd.com>,
        "David (ChunMing) Zhou" <David1.Zhou@amd.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Hawking Zhang <Hawking.Zhang@amd.com>,
        John Clements <john.clements@amd.com>
Cc:     Tao Zhou <tao.zhou1@amd.com>, Guchun Chen <guchun.chen@amd.com>,
        Dennis Li <Dennis.Li@amd.com>, amd-gfx@lists.freedesktop.org,
        dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
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From:   =?UTF-8?Q?Christian_K=c3=b6nig?= <christian.koenig@amd.com>
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Am 05.05.20 um 16:01 schrieb Arnd Bergmann:
> After the structure was padded to 1024 bytes, it is no longer
> suitable for being a local variable, as the function surpasses
> the warning limit for 32-bit architectures:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:587:5: error: stack frame size of 1072 bytes in function 'amdgpu_ras_feature_enable' [-Werror,-Wframe-larger-than=]
> int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
>      ^
>
> Use kzalloc() instead to get it from the heap.
>
> Fixes: a0d254820f43 ("drm/amdgpu: update RAS TA to Host interface")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: Christian König <christian.koenig@amd.com>

We have a bunch of those warnings in the DAL code as well.

Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 31 +++++++++++++++++--------
>   1 file changed, 21 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 538895cfd862..7348619253c7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -588,19 +588,23 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
>   		struct ras_common_if *head, bool enable)
>   {
>   	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> -	union ta_ras_cmd_input info;
> +	union ta_ras_cmd_input *info;
>   	int ret;
>   
>   	if (!con)
>   		return -EINVAL;
>   
> +        info = kzalloc(sizeof(union ta_ras_cmd_input), GFP_KERNEL);
> +	if (!info)
> +		return -ENOMEM;
> +
>   	if (!enable) {
> -		info.disable_features = (struct ta_ras_disable_features_input) {
> +		info->disable_features = (struct ta_ras_disable_features_input) {
>   			.block_id =  amdgpu_ras_block_to_ta(head->block),
>   			.error_type = amdgpu_ras_error_to_ta(head->type),
>   		};
>   	} else {
> -		info.enable_features = (struct ta_ras_enable_features_input) {
> +		info->enable_features = (struct ta_ras_enable_features_input) {
>   			.block_id =  amdgpu_ras_block_to_ta(head->block),
>   			.error_type = amdgpu_ras_error_to_ta(head->type),
>   		};
> @@ -609,26 +613,33 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
>   	/* Do not enable if it is not allowed. */
>   	WARN_ON(enable && !amdgpu_ras_is_feature_allowed(adev, head));
>   	/* Are we alerady in that state we are going to set? */
> -	if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head)))
> -		return 0;
> +	if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head))) {
> +		ret = 0;
> +		goto out;
> +	}
>   
>   	if (!amdgpu_ras_intr_triggered()) {
> -		ret = psp_ras_enable_features(&adev->psp, &info, enable);
> +		ret = psp_ras_enable_features(&adev->psp, info, enable);
>   		if (ret) {
>   			amdgpu_ras_parse_status_code(adev,
>   						     enable ? "enable":"disable",
>   						     ras_block_str(head->block),
>   						    (enum ta_ras_status)ret);
>   			if (ret == TA_RAS_STATUS__RESET_NEEDED)
> -				return -EAGAIN;
> -			return -EINVAL;
> +				ret = -EAGAIN;
> +			else
> +				ret = -EINVAL;
> +
> +			goto out;
>   		}
>   	}
>   
>   	/* setup the obj */
>   	__amdgpu_ras_feature_enable(adev, head, enable);
> -
> -	return 0;
> +	ret = 0;
> +out:
> +	kfree(info);
> +	return ret;
>   }
>   
>   /* Only used in device probe stage and called only once. */