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From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Tue, 5 May 2020 11:34:00 -0400
Message-ID: <CADnq5_ObAv11hmNd_2rksCSYZN2BYV=7qKFr=EMyP5Mqb=vRrQ@mail.gmail.com>
Subject: Re: [PATCH] drm/amdgpu: allocate large structures dynamically
To:     =?UTF-8?Q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>
Cc:     Arnd Bergmann <arnd@arndb.de>,
        Alex Deucher <alexander.deucher@amd.com>,
        "David (ChunMing) Zhou" <David1.Zhou@amd.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Hawking Zhang <Hawking.Zhang@amd.com>,
        John Clements <john.clements@amd.com>,
        Guchun Chen <guchun.chen@amd.com>,
        Tao Zhou <tao.zhou1@amd.com>,
        LKML <linux-kernel@vger.kernel.org>,
        amd-gfx list <amd-gfx@lists.freedesktop.org>,
        Maling list - DRI developers 
        <dri-devel@lists.freedesktop.org>, Dennis Li <Dennis.Li@amd.com>
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On Tue, May 5, 2020 at 10:07 AM Christian K=C3=B6nig
<christian.koenig@amd.com> wrote:
>
> Am 05.05.20 um 16:01 schrieb Arnd Bergmann:
> > After the structure was padded to 1024 bytes, it is no longer
> > suitable for being a local variable, as the function surpasses
> > the warning limit for 32-bit architectures:
> >
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:587:5: error: stack frame size =
of 1072 bytes in function 'amdgpu_ras_feature_enable' [-Werror,-Wframe-larg=
er-than=3D]
> > int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
> >      ^
> >
> > Use kzalloc() instead to get it from the heap.
> >
> > Fixes: a0d254820f43 ("drm/amdgpu: update RAS TA to Host interface")
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>
> Acked-by: Christian K=C3=B6nig <christian.koenig@amd.com>

Applied.  Thanks!

Alex

>
> We have a bunch of those warnings in the DAL code as well.
>
> Christian.
>
> > ---
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 31 +++++++++++++++++-------=
-
> >   1 file changed, 21 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/=
amd/amdgpu/amdgpu_ras.c
> > index 538895cfd862..7348619253c7 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > @@ -588,19 +588,23 @@ int amdgpu_ras_feature_enable(struct amdgpu_devic=
e *adev,
> >               struct ras_common_if *head, bool enable)
> >   {
> >       struct amdgpu_ras *con =3D amdgpu_ras_get_context(adev);
> > -     union ta_ras_cmd_input info;
> > +     union ta_ras_cmd_input *info;
> >       int ret;
> >
> >       if (!con)
> >               return -EINVAL;
> >
> > +        info =3D kzalloc(sizeof(union ta_ras_cmd_input), GFP_KERNEL);
> > +     if (!info)
> > +             return -ENOMEM;
> > +
> >       if (!enable) {
> > -             info.disable_features =3D (struct ta_ras_disable_features=
_input) {
> > +             info->disable_features =3D (struct ta_ras_disable_feature=
s_input) {
> >                       .block_id =3D  amdgpu_ras_block_to_ta(head->block=
),
> >                       .error_type =3D amdgpu_ras_error_to_ta(head->type=
),
> >               };
> >       } else {
> > -             info.enable_features =3D (struct ta_ras_enable_features_i=
nput) {
> > +             info->enable_features =3D (struct ta_ras_enable_features_=
input) {
> >                       .block_id =3D  amdgpu_ras_block_to_ta(head->block=
),
> >                       .error_type =3D amdgpu_ras_error_to_ta(head->type=
),
> >               };
> > @@ -609,26 +613,33 @@ int amdgpu_ras_feature_enable(struct amdgpu_devic=
e *adev,
> >       /* Do not enable if it is not allowed. */
> >       WARN_ON(enable && !amdgpu_ras_is_feature_allowed(adev, head));
> >       /* Are we alerady in that state we are going to set? */
> > -     if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head)))
> > -             return 0;
> > +     if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head))) {
> > +             ret =3D 0;
> > +             goto out;
> > +     }
> >
> >       if (!amdgpu_ras_intr_triggered()) {
> > -             ret =3D psp_ras_enable_features(&adev->psp, &info, enable=
);
> > +             ret =3D psp_ras_enable_features(&adev->psp, info, enable)=
;
> >               if (ret) {
> >                       amdgpu_ras_parse_status_code(adev,
> >                                                    enable ? "enable":"d=
isable",
> >                                                    ras_block_str(head->=
block),
> >                                                   (enum ta_ras_status)r=
et);
> >                       if (ret =3D=3D TA_RAS_STATUS__RESET_NEEDED)
> > -                             return -EAGAIN;
> > -                     return -EINVAL;
> > +                             ret =3D -EAGAIN;
> > +                     else
> > +                             ret =3D -EINVAL;
> > +
> > +                     goto out;
> >               }
> >       }
> >
> >       /* setup the obj */
> >       __amdgpu_ras_feature_enable(adev, head, enable);
> > -
> > -     return 0;
> > +     ret =3D 0;
> > +out:
> > +     kfree(info);
> > +     return ret;
> >   }
> >
> >   /* Only used in device probe stage and called only once. */
>
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