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Date:   Wed, 6 May 2020 06:51:18 +0200
From:   Oleksij Rempel <o.rempel@pengutronix.de>
To:     Grygorii Strashko <grygorii.strashko@ti.com>
Cc:     Andrew Lunn <andrew@lunn.ch>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        David Jander <david@protonic.nl>,
        "David S. Miller" <davem@davemloft.net>, kernel@pengutronix.de,
        linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
        Philippe Schenker <philippe.schenker@toradex.com>,
        Russell King <linux@armlinux.org.uk>
Subject: Re: [PATCH net-next v3] net: phy: micrel: add phy-mode support for
 the KSZ9031 PHY
Message-ID: <20200506045118.hl3sfmww2ncfh5ze@pengutronix.de>
References: <20200422072137.8517-1-o.rempel@pengutronix.de>
 <71dea993-b420-e994-ffa8-87350e157cda@ti.com>
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Hi Grygorii,

On Tue, May 05, 2020 at 09:26:46PM +0300, Grygorii Strashko wrote:
>=20
>=20
> On 22/04/2020 10:21, Oleksij Rempel wrote:
> > Add support for following phy-modes: rgmii, rgmii-id, rgmii-txid, rgmii=
-rxid.
> >=20
> > This PHY has an internal RX delay of 1.2ns and no delay for TX.
> >=20
> > The pad skew registers allow to set the total TX delay to max 1.38ns and
> > the total RX delay to max of 2.58ns (configurable 1.38ns + build in
> > 1.2ns) and a minimal delay of 0ns.
> >=20
> > According to the RGMII v1.3 specification the delay provided by PCB tra=
ces
> > should be between 1.5ns and 2.0ns. The RGMII v2.0 allows to provide this
> > delay by MAC or PHY. So, we configure this PHY to the best values we can
> > get by this HW: TX delay to 1.38ns (max supported value) and RX delay to
> > 1.80ns (best calculated delay)
> >=20
> > The phy-modes can still be fine tuned/overwritten by *-skew-ps
> > device tree properties described in:
> > Documentation/devicetree/bindings/net/micrel-ksz90x1.txt
> >=20
> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> > ---
> > changes v3:
> > - change delay on RX line to 1.80ns
> > - add warning if *-skew-ps properties are used together with not rgmii
> >    mode.
> >=20
> > changes v2:
> > - change RX_ID value from 0x1a to 0xa. The overflow bit was detected by
> >    FIELD_PREP() build check.
> >    Reported-by: kbuild test robot <lkp@intel.com>
> >=20
> >   drivers/net/phy/micrel.c | 128 +++++++++++++++++++++++++++++++++++++--
> >   1 file changed, 123 insertions(+), 5 deletions(-)
> >=20
>=20
> This patch broke networking on at least 5 TI boards:
> am572x-idk
> am571x-idk
> am43xx-hsevm
> am43xx-gpevm
> am437x-idk
>=20
> am57xx I can fix.
>=20
> am437x need to investigate.

Please try:
	phy-mode =3D "rgmii-txid"

I assume your boards are using "rgmii" which should be used only if you
boards have extra long clk traces.

Regards,
Oleksij
--=20
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