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Date:   Wed, 6 May 2020 07:11:34 +0200
From:   Oleksij Rempel <o.rempel@pengutronix.de>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Rob Herring <robh+dt@kernel.org>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        linux-kernel@vger.kernel.org,
        "David S. Miller" <davem@davemloft.net>, netdev@vger.kernel.org,
        Marek Vasut <marex@denx.de>, David Jander <david@protonic.nl>,
        devicetree@vger.kernel.org
Subject: Re: [PATCH v1] dt-bindings: net: nxp,tja11xx: rework validation
 support
Message-ID: <20200506051134.mrm4nuqxssw255tl@pengutronix.de>
References: <20200505104215.8975-1-o.rempel@pengutronix.de>
 <20200505140127.GJ208718@lunn.ch>
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On Tue, May 05, 2020 at 04:01:27PM +0200, Andrew Lunn wrote:
> On Tue, May 05, 2020 at 12:42:15PM +0200, Oleksij Rempel wrote:
> > To properly identify this node, we need to use ethernet-phy-id0180.dc80.
> > And add missing required properties.
> >=20
> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> > ---
> >  .../devicetree/bindings/net/nxp,tja11xx.yaml  | 55 ++++++++++++-------
> >  1 file changed, 35 insertions(+), 20 deletions(-)
> >=20
> > diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/D=
ocumentation/devicetree/bindings/net/nxp,tja11xx.yaml
> > index 42be0255512b3..cc322107a24a2 100644
> > --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> > +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> > @@ -1,4 +1,4 @@
> > -# SPDX-License-Identifier: GPL-2.0+
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >  %YAML 1.2
> >  ---
> >  $id: http://devicetree.org/schemas/net/nxp,tja11xx.yaml#
> > @@ -12,44 +12,59 @@ maintainers:
> >    - Heiner Kallweit <hkallweit1@gmail.com>
> > =20
> >  description:
> > -  Bindings for NXP TJA11xx automotive PHYs
> > +  Bindings for the NXP TJA1102 automotive PHY. This is a dual PHY pack=
age where
> > +  only the first PHY has global configuration register and HW health
> > +  monitoring.
> > =20
> > -allOf:
> > -  - $ref: ethernet-phy.yaml#
> > +properties:
> > +  compatible:
> > +    const: ethernet-phy-id0180.dc80
> > +    description: ethernet-phy-id0180.dc80 used for TJA1102 PHY
> > +
> > +  reg:
> > +    minimum: 0
> > +    maximum: 14
> > +    description:
> > +      The PHY address of the parent PHY.
>=20
> Hi Oleksij
>=20
> reg is normally 0 to 31, since that is the address range for MDIO.=20
> Did you use 14 here because of what strapping allows?

Yes. Only BITs 1:3 are configurable. BIT(0) is always 0 for the PHY0 and 1
for the PHY1

> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#address-cells'
> > +  - '#size-cells'
>=20
> So we have two different meanings of 'required' here.
>=20
> One meaning is the code requires it. compatible is not required, the
> driver will correctly be bind to the device based on its ID registers.
> Is reg also required by the code?
>=20
> The second meaning is about keeping the yaml verifier happy. It seems
> like compatible is needed for the verifier. Is reg also required? We
> do recommend having reg, but the generic code does not require it.

reg is used by:
tja1102_p0_probe()
  tja1102_p1_register()
    of_mdio_parse_addr()

But this is required for the slave PHY. I assume the reg can be
optional for the master PHY. Should I?

Regards,
Oleksij
--=20
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