Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp1650989ybj; Wed, 6 May 2020 02:41:05 -0700 (PDT) X-Google-Smtp-Source: APiQypK2Kne64IJuqfw+oI0+zQFYYm+Bhw/RipupDky9kmRDSqdNFM80dUZgMlv6yDo554wc5538 X-Received: by 2002:a17:907:1185:: with SMTP id uz5mr6506312ejb.335.1588758065416; Wed, 06 May 2020 02:41:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588758065; cv=none; d=google.com; s=arc-20160816; b=bCYxvXugUn5BnZnLvbwxwU1A7A0VeuVx+EOKn5aLxZhopnjjpGhZoON5F69Fq4Mfdf Hn/MRi51xtuGy3fRl47ue+7yuI9hcg5g8odj+wai84WeY41k6Gwv/ttV4kEO4LsWTmQ8 nrllywYj5+AGIIQBgrcOtNXoomsYHzHGlYhAYVDOKVx5UH1cYQMDloAjMr75+NRdhhOn 8MNCj4T5DIh4bkbXSWh99+/rcDwYfGjnlxbdrdMZpXikWT7Vk7wdtx3I2aIRpIkv2K09 b11rn3vXNdIvMd1cpIEqR65JoXlXMm0VtzkFoidRQhYKTYCPjqvRm0DZFdwyKR1Ag3fj HO9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=oVNIVg3MSm9z3ZpYftbr62gYkBjb0sAHx1QmeL8Xo68=; b=XiAkXfUWOIXTw8xZgDB+eRBMDC4mo3kwmHoBBM7uvH5Na8ukeUD6EKC6Zm1atgLbVi mWSNR6uSFrZbyOXZosU1VcBqAdYE36v3h9+42P208LPpiJGyJc6QstSWHbksSKI/999b iclKSJbbkKr32TVmNEBXtdNYciU811iUnK6dlHulkiBjIC5rJLpw+fZ5f9nisRZ4xg9m raOO/cmIDKlJU1sRqzvEDAd7eyDiyenz0b97rknGIhPPRRVzUXd4BBNFZr+34BbmsH30 569F/hN8CpYmZdwh58fX+SLg/Xblvh4+JrLHzC+osmiAEVFaLER6k4Kxxb4ejGbZYkvA sZHw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i4si838884ejv.473.2020.05.06.02.40.42; Wed, 06 May 2020 02:41:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729104AbgEFJhD (ORCPT + 99 others); Wed, 6 May 2020 05:37:03 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:40032 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728640AbgEFJhD (ORCPT ); Wed, 6 May 2020 05:37:03 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 75286179B7B14BBF5296; Wed, 6 May 2020 17:36:58 +0800 (CST) Received: from [127.0.0.1] (10.166.213.93) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.487.0; Wed, 6 May 2020 17:36:52 +0800 Subject: Re: [RFC PATCH] cpufreq: add support for HiSilicon SoC HIP09 To: Sudeep Holla , Xiongfeng Wang CC: , , , , , Jonathan Cameron References: <1588227599-46438-1-git-send-email-wangxiongfeng2@huawei.com> <20200430095559.GB28579@bogus> From: Hanjun Guo Message-ID: <3ba950dd-4065-e4a5-d406-dc5c6c1781a7@huawei.com> Date: Wed, 6 May 2020 17:36:51 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <20200430095559.GB28579@bogus> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Originating-IP: [10.166.213.93] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sudeep, On 2020/4/30 17:55, Sudeep Holla wrote: > On Thu, Apr 30, 2020 at 02:19:59PM +0800, Xiongfeng Wang wrote: >> HiSilicon SoC has a separate System Control Processor(SCP) dedicated for >> clock frequency adjustment and has been using the cpufreq driver >> 'cppc-cpufreq'. New HiSilicon SoC HIP09 add support for CPU Boost, but >> ACPI CPPC doesn't support this. In HiSilicon SoC HIP09, each core has >> its own clock domain. It is better for the core itself to adjust its >> frequency when we require fast response. In this patch, we add a >> separate cpufreq driver for HiSilicon SoC HIP09. >> > > I disagree with this approach unless you have tried to extend the CPPC > in ACPI to accommodate this boost feature you need. Until you show those > efforts and disagreement to do that from ASWG, I am NACKing this approach. Unfortunately we are not in ASWG at now, could you please give some help about extending CPPC in ACPI to support boost feature? Thanks Hanjun