Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp1652256ybj; Wed, 6 May 2020 02:42:42 -0700 (PDT) X-Google-Smtp-Source: APiQypJXgORUa/2jozdRuSgUgOfGA4SqFhVea5wmRQ/PpVL8sGfZnhGdU/7OzDAwPdTn+I+DVv01 X-Received: by 2002:aa7:c795:: with SMTP id n21mr6208288eds.6.1588758162139; Wed, 06 May 2020 02:42:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588758162; cv=none; d=google.com; s=arc-20160816; b=MumfpktqlA/dmzYLtV8pKpjVd+Fv1wWnEB+9eBrG4kz+IfgEWyU2O7pKdaRtNuGWfb 2nM6skOeG+J8DqlI3ky9qvcv8i2aS/XvMNcQwqDGpu52dEr/ekqyFMl+4Glho9ub40kN qjIZMBuj3CKAAuKuxhcqqxNf02CkzCbPGEDXCj5h2Szajr6vnJuXHMcFsN7ZVSLcOqea g3jJW7Rt8JZhk3w7sJycvY/CbYg1jGJQg03q94qXAcul+DXhunCyog98msFjL4oI5TBH sXxWgg+FMrDFIGPXhNZvKGMHmkRjd0iyUJl/MWJ/DMQltesdPv/wWFZwHGlyZ6jfm1J8 S6dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=RZQ2UgpLxSEbdazXu9sj31ZtoZLI5Z4SBMyeYVXIXfA=; b=rqzA3xF51YDXpQqTL8Y3rg8JNIVt85HYn09ieVYwRm6+V25qOnqF0Du1BSphzC11Rs ruAr2kAdDoeYvwqsWQuS3OSoXeLBE1qGuiSX84Alp5mUhI2fIvLT22/KzJJp8HOeTbJp YMq5Pb5S1mBolb8Tq40Bbwhix70hTLuccrvmmBtibgw5Vg847k8z21N2nbnKltQ26CVN u0BlkEYHJCATVezNNCEEX3Mi1Jk+zvi7r9T9nkfYI2bjszSGPEqH4Ih9yRITPTFOFPtC 0RB+Mdkf/Bhm69ici6tjF6tLtAmH5KR0GUIElIgX0X3VgXMtBBipspVC2/7kmdPns40u bG6A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ce9si811628ejc.139.2020.05.06.02.42.19; Wed, 06 May 2020 02:42:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729128AbgEFJki (ORCPT + 99 others); Wed, 6 May 2020 05:40:38 -0400 Received: from relay1-d.mail.gandi.net ([217.70.183.193]:50107 "EHLO relay1-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729060AbgEFJki (ORCPT ); Wed, 6 May 2020 05:40:38 -0400 X-Originating-IP: 42.109.197.213 Received: from localhost (unknown [42.109.197.213]) (Authenticated sender: me@yadavpratyush.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id 5B7AC240004; Wed, 6 May 2020 09:40:32 +0000 (UTC) Date: Wed, 6 May 2020 15:10:28 +0530 From: Pratyush Yadav To: masonccyang@mxic.com.tw Cc: Boris Brezillon , broonie@kernel.org, juliensu@mxic.com.tw, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, miquel.raynal@bootlin.com, Pratyush Yadav , richard@nod.at, tudor.ambarus@microchip.com, vigneshr@ti.com Subject: Re: [PATCH v2 0/5] mtd: spi-nor: Add support for Octal 8D-8D-8D mode Message-ID: <20200506094028.2asq56goslfd2ngo@yadavpratyush.com> References: <1587451187-6889-1-git-send-email-masonccyang@mxic.com.tw> <20200421092328.129308f6@collabora.com> <20200427175536.2mmei2fy6f7bg6jm@yadavpratyush.com> <20200428085401.574wmo6qddmumd7q@yadavpratyush.com> <20200429181856.kkavelcczylg4yxf@yadavpratyush.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/05/20 05:31PM, masonccyang@mxic.com.tw wrote: > Hi Pratyush, > > > I can't apply your patches to enable xSPI Octal mode for > > > mx25uw51245g because your patches set up Octal protocol first and > > > then using Octal protocol to write Configuration Register 2(CFG > > > Reg2). I think driver > > > should write CFG Reg2 in SPI 1-1-1 mode (power on state) and make sure > > > write CFG Reg 2 is success and then setup Octa protocol in the last. > > > > Register writes should work in 1S mode, because nor->reg_proto is only > > set _after_ 8D mode is enabled (see spi_nor_octal_dtr_enable()). In > > fact, both patch 15 and 16 in my series use register writes in 1S mode. > > but I didn't see driver roll back "nor->read/write_proto = 1" > if xxx->octal_dtr_enable() return failed! I copied what spi_nor_quad_enable() did, and made failure fatal. So if xxx->octal_dtr_enable() fails, the probe would fail and the flash would be unusable. You can try your hand at a fallback system where you try all possible protocols available, but I think that should be a different patchset. -- Regards, Pratyush Yadav