Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp1810706ybj; Wed, 6 May 2020 05:53:27 -0700 (PDT) X-Google-Smtp-Source: APiQypJ2k+5X79AyymAqgSPCjRqicV4Isb/1UMmyjNoKWcWami+fd9LrCOT7+lQCdctcFwq8667M X-Received: by 2002:a17:907:2155:: with SMTP id rk21mr7442872ejb.163.1588769606937; Wed, 06 May 2020 05:53:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588769606; cv=none; d=google.com; s=arc-20160816; b=Svnp0v0UuTyPwVci5CpWhToCwzlhh6bGxltAoF1/YnApX1dZRhd5m2jU1jW4Mqe1Bo Rh94yfH4shNYCxeNble4xOK/LJDAq6kJfc/6TzkFxl1X0nvRZPfzyoMssnwdE60Cuats ECt8XwuSQkTqIs+1d0TV4Giv/IeE+TCvZAh+WbebNMLcwRe3lZf86EUzNMCwyTGP5oAA /F1r66CLOjJD1aaFFGqd3b/MGkDWaSa3liV6BDRUV7/rc86ooxm9K6v+ntwSjQvYb41T YJ2dXPZj1/T6SfsLwW/Qkirj35B9LYSEAyhgxpBkCa6mIroHNoJ+ZlehirFdg59bEbdD U4pQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=a0p+OStTfzUnbNVHwVzg/CQx1dQQ2aeA/dE5JIundes=; b=L3Bb/2QXHgXVd3W8Q4FtQ7ueogIDspUrbX6Qr0afjpLhdmqWP6wC0ANFiJnLhQcX/F c7oWKJlvLOXN3l8GVxXd7GQ9JptL2sdYT7BjI2rkSqZ0WGwXFtkjLd90KucdFqfXlld5 n9AlS3B2/FuS9PcWs49WbvCe5tH+APC3U1U/81V0NAun7Tmlwly1pQVW4ahxKwU73JRX d1taMAPtRlvoRh5Thjnl2vRCPvqVtn/hlxCrgvLmeE10pRkKWqWbCQmQ9CvGY6OiY5fN MuFsktgmlW85mv3bvZBl9oW1yx+CIrus2Vx1gCOzTmo7MnT7FpXMnkvcZIKc7EwdjmAR 2TEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id pv24si1182876ejb.244.2020.05.06.05.53.03; Wed, 06 May 2020 05:53:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728510AbgEFMtn (ORCPT + 99 others); Wed, 6 May 2020 08:49:43 -0400 Received: from foss.arm.com ([217.140.110.172]:35878 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728081AbgEFMtm (ORCPT ); Wed, 6 May 2020 08:49:42 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B00411FB; Wed, 6 May 2020 05:49:41 -0700 (PDT) Received: from bogus (unknown [10.37.8.198]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 62EE53F68F; Wed, 6 May 2020 05:49:39 -0700 (PDT) Date: Wed, 6 May 2020 13:49:32 +0100 From: Sudeep Holla To: Hanjun Guo Cc: Xiongfeng Wang , rjw@rjwysocki.net, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, john.garry@huawei.com, Jonathan Cameron , Souvik Chakravarty , Thanu Rangarajan Subject: Re: [RFC PATCH] cpufreq: add support for HiSilicon SoC HIP09 Message-ID: <20200506124932.GA20426@bogus> References: <1588227599-46438-1-git-send-email-wangxiongfeng2@huawei.com> <20200430095559.GB28579@bogus> <3ba950dd-4065-e4a5-d406-dc5c6c1781a7@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3ba950dd-4065-e4a5-d406-dc5c6c1781a7@huawei.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org + Thanu, Souvik who work with ASWG On Wed, May 06, 2020 at 05:36:51PM +0800, Hanjun Guo wrote: > Hi Sudeep, > > On 2020/4/30 17:55, Sudeep Holla wrote: > > On Thu, Apr 30, 2020 at 02:19:59PM +0800, Xiongfeng Wang wrote: > > > HiSilicon SoC has a separate System Control Processor(SCP) dedicated for > > > clock frequency adjustment and has been using the cpufreq driver > > > 'cppc-cpufreq'. New HiSilicon SoC HIP09 add support for CPU Boost, but > > > ACPI CPPC doesn't support this. In HiSilicon SoC HIP09, each core has > > > its own clock domain. It is better for the core itself to adjust its > > > frequency when we require fast response. In this patch, we add a > > > separate cpufreq driver for HiSilicon SoC HIP09. > > > > > > > I disagree with this approach unless you have tried to extend the CPPC > > in ACPI to accommodate this boost feature you need. Until you show those > > efforts and disagreement to do that from ASWG, I am NACKing this approach. > > Unfortunately we are not in ASWG at now, could you please give some > help about extending CPPC in ACPI to support boost feature? > You may have to provide more details than the commit log for sure as I haven't understood the boost feature and what is missing in ACPI CPPC. -- Regards, Sudeep