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Subject: Re: [PATCH v2 1/2] dt-bindings: soc: ti: add binding for k3 platforms
 chipid module
To:     Santosh Shilimkar <ssantosh@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Lokesh Vutla <lokeshvutla@ti.com>, <devicetree@vger.kernel.org>
CC:     Dave Gerlach <d-gerlach@ti.com>, Sekhar Nori <nsekhar@ti.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, Tero Kristo <t-kristo@ti.com>,
        Nishanth Menon <nm@ti.com>
References: <20200505193417.2112-1-grygorii.strashko@ti.com>
 <20200505193417.2112-2-grygorii.strashko@ti.com>
From:   Grygorii Strashko <grygorii.strashko@ti.com>
Message-ID: <a523caa4-bd34-35e3-8e3a-7668a168931d@ti.com>
Date:   Wed, 6 May 2020 22:21:36 +0300
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Hi Rob,

On 05/05/2020 22:34, Grygorii Strashko wrote:
> Add DT binding for Texas Instruments K3 Multicore SoC platforms chipid
> module which is represented by CTRLMMR_xxx_JTAGID register and contains
> information about SoC id and revision.
> 
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
> ---
>   .../bindings/soc/ti/k3-socinfo.yaml           | 40 +++++++++++++++++++
>   1 file changed, 40 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml b/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml
> new file mode 100644
> index 000000000000..a1a8423b2e2e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/ti/k3-socinfo.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 Multicore SoC platforms chipid module
> +
> +maintainers:
> +  - Tero Kristo <t-kristo@ti.com>
> +  - Nishanth Menon <nm@ti.com>
> +
> +description: |
> +  Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is
> +  represented by CTRLMMR_xxx_JTAGID register which contains information about
> +  SoC id and revision.
> +
> +properties:
> +  $nodename:
> +    pattern: "^chipid@[0-9a-f]+$"
> +
> +  compatible:
> +    items:
> +      - const: ti,am654-chipid
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    chipid@43000014 {
> +        compatible = "ti,am654-chipid";
> +        reg = <0x43000014 0x4>;
> +    };
> 

Rob, Do you have any comments here?

-- 
Best regards,
grygorii