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Reply-To: like.xu@intel.com
Subject: Re: [RESEND PATCH] KVM: x86/pmu: Support full width counting
To:     Paolo Bonzini <pbonzini@redhat.com>,
        Like Xu <like.xu@linux.intel.com>,
        Jim Mattson <jmattson@google.com>,
        Sean Christopherson <sean.j.christopherson@intel.com>
Cc:     Vitaly Kuznetsov <vkuznets@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Joerg Roedel <joro@8bytes.org>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20200427071922.86257-1-like.xu@linux.intel.com>
 <aa182eec-3d0b-1452-19cc-20654190a2ae@redhat.com>
From:   "Xu, Like" <like.xu@intel.com>
Organization: Intel OTC
Message-ID: <ce270752-191e-8610-b253-b53870b3f358@intel.com>
Date:   Thu, 7 May 2020 10:22:07 +0800
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Hi Paolo,

Thanks for your comments!

On 2020/5/5 0:57, Paolo Bonzini wrote:
> On 27/04/20 09:19, Like Xu wrote:
>> +	if (vmx_supported_perf_capabilities())
>> +		kvm_cpu_cap_check_and_set(X86_FEATURE_PDCM);
> I think we can always set it, worst case it will be zero.
Sure,  we could set it for x86.
>
> However, blocking intel_pmu_set_msr altogether is incorrect.  Instead,
> you need to:
>
> - list the MSR in msr_based_features_all so that it appears in
> KVM_GET_MSR_FEATURE_INDEX_LIST
>
> - return the supported bits in vmx_get_msr_feature
>
> - allow host-initiated writes (as long as they only set supported bits)
> of the MSR in intel_pmu_set_msr.
Please review the v2 patch for this feature,
https://lore.kernel.org/kvm/20200507021452.174646-1-like.xu@linux.intel.com/

Thanks,
Like Xu
>
> Thanks,
>
> Paolo
>