Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp945193ybj; Thu, 7 May 2020 11:06:10 -0700 (PDT) X-Google-Smtp-Source: APiQypKUKN0zExwmYsjGTn92xDkpc2PF4zUjDIios0enByzV0zVOUVUT18BO5wb2Vwhdn9yNmy4i X-Received: by 2002:a50:ee0e:: with SMTP id g14mr13478441eds.34.1588874769760; Thu, 07 May 2020 11:06:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588874769; cv=none; d=google.com; s=arc-20160816; b=B3tAYTxFKTWSR7fUCbBHmVJ5BLmCmu8TiWatD14p9yKOzdN9gzdm7oJ/6Cm5ZkA1YM 9UFeFQJ+Qfdoal2kyEA8LFS3vXUDTLR/yjn9u+2qE33R7QzMa49wdn9Os5BiML32bNJp F81EODWHEn1EP6wjdvQbERm8uJFHf/lWIPUnHG7s4ENQXdFAQ2NsBQkx16mpJw7Dh75L a2EQj4x0YDQ68dmUv14b01GO7EpZcaGu7/jnTwqzElxS6yg2Qu0tzxIeLtab79cSf+Ad lmDXSY97ZlMUn5OfgisKkyClLTn5qup1Xl+KoLoaLrnMmTK+3oB9y/oVaUCENk3B/sMN 4I6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=FarLCIAxioIy7Zvxmj20vZzhDolm9prrhkzsQRGzpt0=; b=XA4gMmqkOTEpm3auo1i86DzKyQPTJlIXTLtlb8eDTwwSthiR9uXot8fO/C8KS9QtFF LIJKIsL2eFAsWYDrVQjN8uJQoldZZSdgJNAhTKenIcyjT+RyFlnn6c9PQn0Ucq8nWFmR DBwPV2iCOBoKjH1LhPd/pDyvxvZdF4D5EuseG2Ukw3Bk/SlvaYEFHdqugA81lteGxAml YOEeeXNJjuuBssBoflICSZ26nK0exWT1N6FXo/NC46zpyXS1MljZybJ0pyWVmFdLgwMT naj5FLcwkV4kB2V71ET7AnwIvBC8zM4wVG5KhlWDIDcb4rJHiXupNm3+mcyugOQEFwYA AOkQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s8si3542681eji.349.2020.05.07.11.05.44; Thu, 07 May 2020 11:06:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726744AbgEGSD4 (ORCPT + 99 others); Thu, 7 May 2020 14:03:56 -0400 Received: from relay1-d.mail.gandi.net ([217.70.183.193]:24667 "EHLO relay1-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726320AbgEGSD4 (ORCPT ); Thu, 7 May 2020 14:03:56 -0400 X-Originating-IP: 42.109.205.33 Received: from localhost (unknown [42.109.205.33]) (Authenticated sender: me@yadavpratyush.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id E413C240003; Thu, 7 May 2020 18:03:51 +0000 (UTC) Date: Thu, 7 May 2020 23:33:46 +0530 From: Pratyush Yadav To: Daniel Walker Cc: Tudor Ambarus , Vignesh Raghavendra , Richard Weinberger , xe-linux-external@cisco.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Miquel Raynal Subject: Re: [RFC-PATCH] mtd: spi-nor: add conditional 4B opcodes Message-ID: <20200507180346.gwni4hf6kb6gd2e5@yadavpratyush.com> References: <20200507162047.30788-1-danielwa@cisco.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200507162047.30788-1-danielwa@cisco.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/05/20 09:20AM, Daniel Walker wrote: > Some chips have 4B opcodes, but there is no way to know if they have > them. This device tree option allows platform owners to force enable 4b > opcodes when they know their chips support it even when it can be > automatically identified. Do you mean that two chips might have the same ID but one of them can support 4B opcodes and the other can not? Is it possible to detect this in a fixup hook? I think it would be better to do something like this in a fixup hook instead of via device tree. > Cc: xe-linux-external@cisco.com > Signed-off-by: Daniel Walker > --- > drivers/mtd/spi-nor/core.c | 5 +++++ > drivers/mtd/spi-nor/core.h | 5 +++++ > drivers/mtd/spi-nor/micron-st.c | 2 +- > 3 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index cc68ea84318e..2bd130687f4b 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -3134,6 +3134,11 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > if (info->flags & SPI_NOR_HAS_LOCK) > nor->flags |= SNOR_F_HAS_LOCK; > > + /* Add SPI_NOR_4B_OPCODES if force in the device tree */ > + if (info->flags & SPI_NOR_COND_4B_OPCODES && > + of_property_read_bool(np, "force-4b-opcodes")) > + info->flags |= SPI_NOR_4B_OPCODES; > + > mtd->_write = spi_nor_write; > > /* Init flash parameters based on flash_info struct and SFDP */ > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index 6f2f6b27173f..49e17415d834 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -312,6 +312,11 @@ struct flash_info { > * Must be used with SPI_NOR_4BIT_BP. > */ > > +#define SPI_NOR_COND_4B_OPCODES BIT(19) /* > + * Same as SPI_NOR_4B_OPCODES, but > + * must also be force in the device > + * tree. > + */ > /* Part specific fixup hooks. */ > const struct spi_nor_fixups *fixups; > }; > diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c > index 6c034b9718e2..f827454eaa5f 100644 > --- a/drivers/mtd/spi-nor/micron-st.c > +++ b/drivers/mtd/spi-nor/micron-st.c > @@ -37,7 +37,7 @@ static const struct flash_info st_parts[] = { > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | > USE_FSR | SPI_NOR_DUAL_READ | > - SPI_NOR_QUAD_READ) }, > + SPI_NOR_QUAD_READ | SPI_NOR_COND_4B_OPCODES) }, > { "mt25qu256a", INFO6(0x20bb19, 0x104400, 64 * 1024, 512, > SECT_4K | USE_FSR | SPI_NOR_DUAL_READ | > SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, -- Regards, Pratyush Yadav