Received: by 2002:a25:23cc:0:0:0:0:0 with SMTP id j195csp300838ybj; Fri, 8 May 2020 12:09:37 -0700 (PDT) X-Google-Smtp-Source: APiQypJNHkVXNutJ3PLtZV9Mdd40S6S/T7IqnhEM52UEv1ItlkO79G9bHiHmOIaCeXbfkXjiYtnU X-Received: by 2002:a17:906:3492:: with SMTP id g18mr3068391ejb.112.1588964977401; Fri, 08 May 2020 12:09:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588964977; cv=none; d=google.com; s=arc-20160816; b=cD4SmCaBxwYhDOD9boGZY1KExVAA8Etg5K27RgLdHRRGyVjWr3R/o3Sk6SbJrUFlz8 7FIN4Mxj/R/k/aGhUk9BA0I9svPfaw4AQ33wRgfdIGaaCGdESx7ZB/jEIA7rIMiFm/CH Xz3xduR69ZC2gxwJMCkjCHT15WMRuUzAnqkVEf+nSGbzaF+lPL237e687Jrruuq5x1tc SMVRIp/Vx3fk06JCb/v+4JHrrdM4mopsusmtfQtk4ytyJ129z93pgH9l17CnQd3I9Npp pZIwpnKVJlOURD8lWfBc+0RjuoBKBUYtPLdU6BJXcaNLt4edA8okzmNPSMzVvwlZ63f5 GJ7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=Sm5qWdk8O4cel3aKR4UPojfaKdaFR2g1Wfusb7MEago=; b=Hr6KXdcu0scwwmO73aqMdHR2irauHbE5zWKTeDDuJSl6AUAa1JpGS02ROFAVJxapDx 5PS4SJn1y+BRH8d53L6OIqsjEqAVw1yHzMAR9G+ZhQTHP/9YrZs8jKgWazNp7KIlhKFp cWBnKN6ibh8k54XTGLECY+MXL2rYcIortTkzf98kzLeIyjLqpJH3vQcaMWFgp1+/9YCV EEkYO2EKcRsUA500zObswWOKB8oSDLEU1mRisk+t0gHWWH9eje4hvnNT6s5spVd/l4nv TeQTeWjnb2AHp3DixDCJ7n5b1nzKvxiONjUw/9oC1Rq+wuvxULWCWqT9aIhCbIwQkwvB yRxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id by26si1476283edb.144.2020.05.08.12.09.13; Fri, 08 May 2020 12:09:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726948AbgEHTHp (ORCPT + 99 others); Fri, 8 May 2020 15:07:45 -0400 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:58201 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726863AbgEHTHo (ORCPT ); Fri, 8 May 2020 15:07:44 -0400 X-Originating-IP: 157.36.216.22 Received: from localhost (unknown [157.36.216.22]) (Authenticated sender: me@yadavpratyush.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 9F7331C0006; Fri, 8 May 2020 19:07:38 +0000 (UTC) Date: Sat, 9 May 2020 00:37:35 +0530 From: Pratyush Yadav To: "Daniel Walker (danielwa)" Cc: Tudor Ambarus , Vignesh Raghavendra , Richard Weinberger , "xe-linux-external(mailer list)" , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" , Miquel Raynal Subject: Re: [RFC-PATCH] mtd: spi-nor: add conditional 4B opcodes Message-ID: <20200508190735.tpgeuirsnyjexfz4@yadavpratyush.com> References: <20200507162047.30788-1-danielwa@cisco.com> <20200507180346.gwni4hf6kb6gd2e5@yadavpratyush.com> <20200507181356.GZ9016@zorba> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200507181356.GZ9016@zorba> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Daniel, On 07/05/20 06:13PM, Daniel Walker (danielwa) wrote: > On Thu, May 07, 2020 at 11:33:46PM +0530, Pratyush Yadav wrote: > > On 07/05/20 09:20AM, Daniel Walker wrote: > > > Some chips have 4B opcodes, but there is no way to know if they have > > > them. This device tree option allows platform owners to force enable 4b > > > opcodes when they know their chips support it even when it can be > > > automatically identified. > > > > Do you mean that two chips might have the same ID but one of them can > > support 4B opcodes and the other can not? Is it possible to detect this > > in a fixup hook? I think it would be better to do something like this in > > a fixup hook instead of via device tree. > > Yes. The chip I added the option for is an example of this, it's n25q256a. I'm not familiar with the > fixup hook mechanism, but I would assume you need some way to tell between the 4B > opcode chips and the non-4B opcode chips. For n25q256a, we have not found a way > to do that. I'm assuming this patch is related to [0]. If all you want is to address memory above 16M, why not switch to 4-byte addressing mode instead? Taking a quick look at the datasheet tells me this can be done via the "Enter 4-byte address mode" command (0xB7). Then just use the regular read/program commands with 4-byte addresses. Does that work for you? Is there any reason you _have_ to use dedicated 4B opcodes? [0] https://lore.kernel.org/linux-mtd/20200417174620.16420-1-danielwa@cisco.com/ -- Regards, Pratyush Yadav