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Date:   Sun, 10 May 2020 17:53:19 -0700
From:   Andi Kleen <ak@linux.intel.com>
To:     Sasha Levin <sashal@kernel.org>
Cc:     Dave Hansen <dave.hansen@intel.com>, linux-kernel@vger.kernel.org,
        tglx@linutronix.de, bp@alien8.de, luto@kernel.org, hpa@zytor.com,
        tony.luck@intel.com, ravi.v.shankar@intel.com,
        chang.seok.bae@intel.com
Subject: Re: [PATCH v11 00/18] Enable FSGSBASE instructions
Message-ID: <20200511005319.GK3538@tassilo.jf.intel.com>
References: <20200509173655.13977-1-sashal@kernel.org>
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 <20200510141625.GL13035@sasha-vm>
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> My interest in this is that we have a few workloads that value the
> ability to access FS/GS base directly and show nice performance

Can you please share some rough numbers, Sasha?

I would expect everything that does a lot of context switches
to benefit automatically, apart from the new free register (which
requires enabling, but also has great potential)

Also of course NMIs will be faster, so perf will have somewhat
lower overhead when profiling.

-Andi