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Date:   Mon, 11 May 2020 00:47:09 -0400
From:   Sasha Levin <sashal@kernel.org>
To:     Andi Kleen <ak@linux.intel.com>
Cc:     Dave Hansen <dave.hansen@intel.com>, linux-kernel@vger.kernel.org,
        tglx@linutronix.de, bp@alien8.de, luto@kernel.org, hpa@zytor.com,
        tony.luck@intel.com, ravi.v.shankar@intel.com,
        chang.seok.bae@intel.com
Subject: Re: [PATCH v11 00/18] Enable FSGSBASE instructions
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On Sun, May 10, 2020 at 05:53:19PM -0700, Andi Kleen wrote:
>> My interest in this is that we have a few workloads that value the
>> ability to access FS/GS base directly and show nice performance
>
>Can you please share some rough numbers, Sasha?

I don't have any recent numbers around these - this series effectively
enables certain workloads rather than just improve the performance
somewhat so benchmarking for exact numbers isn't too interesting here.

>I would expect everything that does a lot of context switches
>to benefit automatically, apart from the new free register (which
>requires enabling, but also has great potential)

And even more so when these registers are actually being used for the
purpose they were designed for (this is in the context of secure
computing/enclaves/etc).

-- 
Thanks,
Sasha