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11 May 2020 11:12:33 -0700 IronPort-SDR: a5dNAnaZU73+PB47lD7rYy9vZpVDkfMS/Udz9CRvWB+kMJ1Os2WPkMyiKy+p7EzQchQMRHMAbb VL4hbgjUHS1g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,380,1583222400"; d="scan'208";a="279862110" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga002.jf.intel.com with ESMTP; 11 May 2020 11:12:33 -0700 Received: from fmsmsx163.amr.corp.intel.com (10.18.125.72) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 11 May 2020 11:12:32 -0700 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.60]) by fmsmsx163.amr.corp.intel.com ([169.254.6.217]) with mapi id 14.03.0439.000; Mon, 11 May 2020 11:12:32 -0700 From: "Ruhl, Michael J" To: Daniel Vetter , LKML CC: David Airlie , Intel Graphics Development , DRI Development , Thomas Zimmermann , "Vetter, Daniel" Subject: RE: [PATCH 1/3] drm/writeback: don't set fence->ops to default Thread-Topic: [PATCH 1/3] drm/writeback: don't set fence->ops to default Thread-Index: AQHWJ3Q7yTxcG3nXxUawaG6GrIfCOKijMEEw Date: Mon, 11 May 2020 18:12:32 +0000 Message-ID: <14063C7AD467DE4B82DEDB5C278E8663010E20F82D@FMSMSX108.amr.corp.intel.com> References: <20200511091142.208787-1-daniel.vetter@ffwll.ch> In-Reply-To: <20200511091142.208787-1-daniel.vetter@ffwll.ch> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.1.200.107] Content-Type: text/plain; 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