Received: by 2002:a25:868d:0:0:0:0:0 with SMTP id z13csp2692782ybk; Tue, 12 May 2020 05:58:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz2YL8Ap4wmw1Ik9myuVAeWVxY+B3lLsUUmo4zX0LjcEB1jDH0aUBxO0fSw5JY63BT2iPoC X-Received: by 2002:a50:9f66:: with SMTP id b93mr4849191edf.376.1589288325730; Tue, 12 May 2020 05:58:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589288325; cv=none; d=google.com; s=arc-20160816; b=veWCHVKdQtBW7yoWieGPxw/4BBc97eFPX+/hE7FOqSekvildccq6kNB7/4our73WBp pSbXnB5urn+l6nFbemHstQ4BCRp0HHeIhaJOE+bcU2xYejpH+BI6+7Kw5mqAr0EcIG1g Zp6oR6ugmppfz6ytfci2oOd08ldABS1ZmcypUESoIjZf0Y3VTmck9L29M7GWAOFhtRlC 9AiTy0+CwIH5mP5oa/wati5Ttln9aeMlCRfULHr1ukf0QBDaT6gxPVbVk8sOcWsuDpmc nZlPGYPB6EE7eyEcIrtjlbaYLqrd3BDmPQW2ADqcl+8Z7QdIWFyhIvRnVvE3GYCOBIp9 jLRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UrDz0VtEFIllRgR/SygMJHwSLsI5h5gjPBKpNjucqnU=; b=mv+zpV+/n77JUDQ/liUt9HQRVPEdjeVzIKyGjksvPEBwSAfve+4veEIjyobQqUFIyA PHUvIeRNW6U1KtHE77lFBmwQ8pKkkjhhqrrIlQ8mh1e72JTTCDCNsKJ5jeWSiWYHLKsK e+2hhcZ/7kdpndQdSu5gbf9iG7U1ge0d/QYkxBnIgcHoABe/Mtpi7lJ2ONRcGzp9n0gj uBaW6+ljp5Dmdwj8AH1UTHMMOHxwuaqm9dlIoUm/CJfvHImL1aQWKbch8+qtZqaYJUgJ MruO6+5Zolxa5S6ZsKgkd2DvCADuzTQVyjQUmtRzSKRu59CpgpUR+ThMRoMqTNEOOPF4 9uZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRQiCfER; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q18si7887016edg.149.2020.05.12.05.58.22; Tue, 12 May 2020 05:58:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRQiCfER; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730052AbgELMye (ORCPT + 99 others); Tue, 12 May 2020 08:54:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729980AbgELMyJ (ORCPT ); Tue, 12 May 2020 08:54:09 -0400 Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E13E9C061A0E for ; Tue, 12 May 2020 05:54:08 -0700 (PDT) Received: by mail-wr1-x442.google.com with SMTP id l17so1672363wrr.4 for ; Tue, 12 May 2020 05:54:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UrDz0VtEFIllRgR/SygMJHwSLsI5h5gjPBKpNjucqnU=; b=hRQiCfERNwcKeaXH+vBgWstpdhfVeFUqZ1HMM5gInNFUPCUmTIxlN+nW06ZqEyr1MT WJt82jfFMhSh3/RaGC13yJslFwkNU9IP5rTAXxevITstBNNe0Q0GqLiQ8X/4kMoTb5St 9DB5LdqtelZUdP4aOiA8r4r6CKfpEsAkHPc+1ZB0OvODMQGzdCislqEz/wGa5WTmLoY2 d/LAisGXl4ceWObzMaSX+TnByQmuW6rujCdNxrDyZktJU5cYwJDxyLT3uqKLbzHAA/zv 4Q+Skz9YusrYZTS4w02hgcM5lS0pRpHRcUHCIILUcGrWW36OTz9Rc638ZOyVZKUaow2B luIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UrDz0VtEFIllRgR/SygMJHwSLsI5h5gjPBKpNjucqnU=; b=Z9uEDhbdORTTovyfMXmGJPY36TxORHKNGgYQirqK4HmPvoR79IlT8kBzIllrsb38/g dmbNdE7aJUd91lVYI8UfuUqYYxVt8uHN9t6h9G7WHoeL0kse0YhRzC08tkyuY/W4wyjY LNYxt3rkkwJScXS5varE6rGYBttF93kox+U2b+wJhUWkJJQ0cb0aZiwzqYGpapYlMLq8 pyw+mviRLCpXlrXIYyA1gxnH+J3YUVmSSda5g/eCAYdH6io+obaixj0tLs9nStkMDCNN A+45TPAaQmKWK1PEbsQiMYfidpaUZ1NXV8w7x2FqkBDEa0ZsipDcz5KXzUngdtxEQjoy tHGQ== X-Gm-Message-State: AGi0PuZpNxRrKahiWZGByvbqCKPVAe8skG5eMKmo36VGeCjzrNNd4iNR 2SCZlqK5p6dREO1wiIP5wlW73Q== X-Received: by 2002:a5d:614b:: with SMTP id y11mr26414026wrt.77.1589288047573; Tue, 12 May 2020 05:54:07 -0700 (PDT) Received: from localhost.localdomain (212-39-89-66.ip.btc-net.bg. [212.39.89.66]) by smtp.googlemail.com with ESMTPSA id n13sm2433938wrs.2.2020.05.12.05.54.05 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 May 2020 05:54:06 -0700 (PDT) From: Georgi Djakov To: vireshk@kernel.org, nm@ti.com, sboyd@kernel.org, rjw@rjwysocki.net, saravanak@google.com, sibis@codeaurora.org, mka@chromium.org Cc: robh+dt@kernel.org, rnayak@codeaurora.org, bjorn.andersson@linaro.org, vincent.guittot@linaro.org, jcrouse@codeaurora.org, evgreen@chromium.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v8 07/10] cpufreq: dt: Add support for interconnect bandwidth scaling Date: Tue, 12 May 2020 15:53:24 +0300 Message-Id: <20200512125327.1868-8-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200512125327.1868-1-georgi.djakov@linaro.org> References: <20200512125327.1868-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In addition to clocks and regulators, some devices can scale the bandwidth of their on-chip interconnect - for example between CPU and DDR memory. Add support for that, so that platforms which support it can make use of it. Reviewed-by: Matthias Kaehlcke Signed-off-by: Georgi Djakov --- v8: * Picked reviewed-by tag. * Added a separate patch to check the number of paths in DT and validate each one of them. drivers/cpufreq/Kconfig | 1 + drivers/cpufreq/cpufreq-dt.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig index c3e6bd59e920..db2ad54ee67f 100644 --- a/drivers/cpufreq/Kconfig +++ b/drivers/cpufreq/Kconfig @@ -217,6 +217,7 @@ config CPUFREQ_DT config CPUFREQ_DT_PLATDEV bool + depends on INTERCONNECT || !INTERCONNECT help This adds a generic DT based cpufreq platdev driver for frequency management. This creates a 'cpufreq-dt' platform device, on the diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index 26fe8dfb9ce6..4ecef3257532 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -95,6 +96,7 @@ static int resources_available(void) struct device *cpu_dev; struct regulator *cpu_reg; struct clk *cpu_clk; + struct icc_path *cpu_path; int ret = 0; const char *name; @@ -121,6 +123,19 @@ static int resources_available(void) clk_put(cpu_clk); + cpu_path = of_icc_get(cpu_dev, NULL); + ret = PTR_ERR_OR_ZERO(cpu_path); + if (ret) { + if (ret == -EPROBE_DEFER) + dev_dbg(cpu_dev, "defer icc path: %d\n", ret); + else + dev_err(cpu_dev, "failed to get icc path: %d\n", ret); + + return ret; + } + + icc_put(cpu_path); + name = find_supply_name(cpu_dev); /* Platform doesn't require regulator */ if (!name)