Received: by 2002:a25:868d:0:0:0:0:0 with SMTP id z13csp64254ybk; Tue, 12 May 2020 15:29:00 -0700 (PDT) X-Google-Smtp-Source: APiQypLimSJ1EVMTsKbBMc4Aa52kXqPJQ7oVStRAc614oDOLGg0JKOQsE5Zunj2sTqfVVdPEzaCD X-Received: by 2002:aa7:c608:: with SMTP id h8mr20357314edq.232.1589322540365; Tue, 12 May 2020 15:29:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589322540; cv=none; d=google.com; s=arc-20160816; b=d46L9L6ZdbODJq4db1cnqFceGjhyH9cNuEEgWBst6rkoWUsbR0oGJ9Q2+SI8eUBmPS +FDpnyxOcv/LSPQpl/tqKM58GdawF4dE0AE8iJriDcY8SjJaEErkLBSyKYhFNBxBws5s yFUn7C+S2CvMnHiECB7DF+rXc4AFd3Za5b7B00BLPCsFXOTCOazyvgqKWY2V4TF+GBgr eeDXrGTcLlBt7TIOKDgnGlTcOuV+1bd1wCpGoP83eVdLaLnaaU+eSQGq5kZ3qQdgXWbn u/hmdFpzDsHG/fog9kwxYUMoZpgMoStv64qlR4fEsY9SVTsvTGAANSIPelLYLZZRnuLH os7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :dkim-signature; bh=NG6we4EVElAPQUK0aN618c7gFt1x3MHwQbr2/Svw2vI=; b=EodxD5bGLfZfRV7CrurCTNrcakxt9TgZwuizj+y9ZJhLspla0uR5in2SanWcqOfbp6 mDMGSeaX8widUlspxSzsiZPI6UB5Xe3Xb08CA3skHU8cMmgkjpvhW5eAwNITLr1Zv8Db rBD4vJ3XET2f2kowhPpsPg9desoC2GrYrfPPeWJ6FQeX94Z506YffDngjo7CAMnT49O/ 4lQMPqlKd1wGSinwViP+lL8P7mujHTKBe4qKTIOD444Ir4clhSE60P+tCA/xNk+q65WW hGQ0KFYlJZk67vIJEdxut1vGQe0y7P6Qh6uw6j0mJSzOs9v6xJiz4uqy7eo1fFTpSN3f bNqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kNEV5mI0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z23si3710164ejr.394.2020.05.12.15.28.37; Tue, 12 May 2020 15:29:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kNEV5mI0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731786AbgELWYb (ORCPT + 99 others); Tue, 12 May 2020 18:24:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1731594AbgELWY1 (ORCPT ); Tue, 12 May 2020 18:24:27 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC63FC061A0C for ; Tue, 12 May 2020 15:24:27 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id v63so7064593pfb.10 for ; Tue, 12 May 2020 15:24:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=NG6we4EVElAPQUK0aN618c7gFt1x3MHwQbr2/Svw2vI=; b=kNEV5mI0LwUaQw+DbWntL8ZgPqqlUBdufqDPVeVaEhZANnwVoh0chDp/Uo97YcBtRh 223QYDNVBusXaAIEKFWART+4E5rHM+7cdyocVpyOKLwXxztGya4gLbJPe6p08mf7yhxd zcFUWbivJqKcQBSbJJo4RRYbSd76fM4r6z1VlOXHn26I9l6HOnZ/ytcP0I+hXggiTJqj N4kH5qY5YythLgLQ5fPBn+6mdRncEaP6pFehPaISXvUd7oGYr/mUISfpaFk49C+TMhE4 R2KO92/B2yrY288FYdxfaXUa7nb8emvCf+jRHFDz1wIwe4zFUlmsX7N39kUjuoHrnxmo aRow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=NG6we4EVElAPQUK0aN618c7gFt1x3MHwQbr2/Svw2vI=; b=p7LcexU/E1aFiRoZ2H/9dBBIsupv9obVATEnDxPA81r199LYmbFwqfzE1AKhsA6zvU nTNkQ33IhffS8pVVvL4MYBwAgMh565VnZ29YHfsLmjkBwl2VmZqvvhEe5F3wm8RHl8Dv OaGOR5An0bBCp37Lknge9yduOHVaTzlpezqGYPI8+ssq3XlAWj5mLnfJA07jlgnBh6hA 4DcLKcS6spY2t8FJbIEvMHzGF4Fn6Q2bgcC6DYEoKSH7FXbEfsO2nOGwVx+/uuISrEQ2 JeCPdbQf1r5WNuT7qlJROGFCxYJMl59QeskoaDped2Z2IRgwvvvTdfq1vNlmWBglhVQW dh1Q== X-Gm-Message-State: AGi0PuY7oMy9yaSmZSFMdOGebSmSlAfRag/U2hPfY1xs8zBCRSkOGzqJ wE8F5SQAwOcFpbRPjIZZhu7gJA== X-Received: by 2002:aa7:9690:: with SMTP id f16mr24507424pfk.20.1589322267141; Tue, 12 May 2020 15:24:27 -0700 (PDT) Received: from builder.lan (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id k4sm10971599pgg.88.2020.05.12.15.24.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 15:24:26 -0700 (PDT) Date: Tue, 12 May 2020 15:22:53 -0700 From: Bjorn Andersson To: Maulik Shah Cc: andy.gross@linaro.org, linus.walleij@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, dianders@chromium.org, swboyd@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Venkata Narendra Kumar Gutta Subject: Re: [PATCH] pinctrl: qcom: Add affinity callbacks to msmgpio IRQ chip Message-ID: <20200512222253.GP2165@builder.lan> References: <1588314617-4556-1-git-send-email-mkshah@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1588314617-4556-1-git-send-email-mkshah@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 30 Apr 23:30 PDT 2020, Maulik Shah wrote: > From: Venkata Narendra Kumar Gutta > > Wakeup capable GPIO IRQs routed via PDC are not being migrated when a CPU > is hotplugged. Add affinity callbacks to msmgpio IRQ chip to update the > affinity of wakeup capable IRQs. > > Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") > Signed-off-by: Venkata Narendra Kumar Gutta > [mkshah: updated commit text and minor code fixes] > Signed-off-by: Maulik Shah Reviewed-by: Bjorn Andersson Regards, Bjorn > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index 29259fe..83b7d64 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -1033,6 +1033,29 @@ static void msm_gpio_irq_relres(struct irq_data *d) > module_put(gc->owner); > } > > +static int msm_gpio_irq_set_affinity(struct irq_data *d, > + const struct cpumask *dest, bool force) > +{ > + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); > + struct msm_pinctrl *pctrl = gpiochip_get_data(gc); > + > + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) > + return irq_chip_set_affinity_parent(d, dest, force); > + > + return 0; > +} > + > +static int msm_gpio_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) > +{ > + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); > + struct msm_pinctrl *pctrl = gpiochip_get_data(gc); > + > + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) > + return irq_chip_set_vcpu_affinity_parent(d, vcpu_info); > + > + return 0; > +} > + > static void msm_gpio_irq_handler(struct irq_desc *desc) > { > struct gpio_chip *gc = irq_desc_get_handler_data(desc); > @@ -1131,6 +1154,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) > pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake; > pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres; > pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; > + pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; > + pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; > > np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); > if (np) { > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation