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[23.128.96.18]) by mx.google.com with ESMTP id w5si8034086edx.570.2020.05.12.16.22.05; Tue, 12 May 2020 16:22:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731618AbgELXU3 (ORCPT + 99 others); Tue, 12 May 2020 19:20:29 -0400 Received: from mga04.intel.com ([192.55.52.120]:19892 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726031AbgELXU3 (ORCPT ); Tue, 12 May 2020 19:20:29 -0400 IronPort-SDR: YdYNx9pKyBQHCPxFmdAz9etEPjqCe0hxmlIKAw31JWiR80A1g3yGf3uzNI9B5iVutV+d2sA1u+ xUyEgcqYJvXA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2020 16:20:28 -0700 IronPort-SDR: 2bY9aIWdEVA4WohSO5BDZLI/cBY8KdAlvgEdhIP3IFHm0VOoDp5+sZbA7MgK4kJDb3DtXanXPV d+dfWu+hj77A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,385,1583222400"; d="scan'208";a="280304543" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga002.jf.intel.com with ESMTP; 12 May 2020 16:20:28 -0700 Message-ID: <5cc163ff9058d1b27778e5f0a016c88a3b1a1598.camel@intel.com> Subject: Re: [PATCH v10 01/26] Documentation/x86: Add CET description From: Yu-cheng Yu To: Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang Date: Tue, 12 May 2020 16:20:32 -0700 In-Reply-To: References: <20200429220732.31602-1-yu-cheng.yu@intel.com> <20200429220732.31602-2-yu-cheng.yu@intel.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.32.4 (3.32.4-1.fc30) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2020-04-29 at 16:02 -0700, Yu-cheng Yu wrote: > On Wed, 2020-04-29 at 15:53 -0700, Dave Hansen wrote: > > On 4/29/20 3:07 PM, Yu-cheng Yu wrote: > > > +Note: > > > + There is no CET-enabling arch_prctl function. By design, CET is enabled > > > + automatically if the binary and the system can support it. > > > > I think Andy and I danced around this last time. Let me try to say it > > more explicitly. > > > > I want CET kernel enabling to able to be disconnected from the on-disk > > binary. I want a binary compiled with CET to be able to disable it, and > > I want a binary not compiled with CET to be able to enable it. I want > > different threads in a process to be able to each have different CET status. > > The kernel patches we have now can be modified to support this model. If after > discussion this is favorable, I will modify code accordingly. To turn on/off and to lock CET are application-level decisions. The kernel does not prevent any of those. Should there be a need to provide an arch_prctl() to turn on CET, it can be added without any conflict to this series. > > Which JITs was this tested with? I think as a bare minimum we need to > > know that this design can accommodate _a_ modern JIT. It would be > > horrible if the browser javascript engines couldn't use this design, for > > instance. > > JIT work is still in progress. When that is available I will test it. I found CET has been enabled in LLVM JIT, Mesa JIT as well as sljit which is used by jit. So the current model works with JIT. Yu-cheng