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[23.128.96.18]) by mx.google.com with ESMTP id s16si8601673ejr.170.2020.05.13.00.09.47; Wed, 13 May 2020 00:10:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ffwll.ch header.s=google header.b=OZiU+kRV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730258AbgEMHIA (ORCPT + 99 others); Wed, 13 May 2020 03:08:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729189AbgEMHIA (ORCPT ); Wed, 13 May 2020 03:08:00 -0400 Received: from mail-ot1-x341.google.com (mail-ot1-x341.google.com [IPv6:2607:f8b0:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9FD8C061A0E for ; Wed, 13 May 2020 00:07:59 -0700 (PDT) Received: by mail-ot1-x341.google.com with SMTP id a68so4139149otb.10 for ; Wed, 13 May 2020 00:07:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=U5dnCZ5YNvHzHQjGscrcpq9MiALGgU67N8Jq5EBQuzw=; b=OZiU+kRVCLk5/6W0St2OK5Xb+p5aH38bGDJXr1TsF9faLdtdBKQuGuJ7Zp5SiMdew7 euECR2vCo6+/20wE4jAyKXi43lO8iX735T4hub/MDAh5jbFqtfScDmRenqpoSLVd8NNf g8jnREjHPAvO3tUS/62IwHmPFGNzojTApT+lE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=U5dnCZ5YNvHzHQjGscrcpq9MiALGgU67N8Jq5EBQuzw=; b=pweqAWhyvvZEig/2jWnGJ4Plsxrv0m+fPhuxwegG3LaAbmR3V62eYjpzYU5LG5nofh oK8x980teJN7u1sCApNPYUT7Y/ih0lPycxBmlbpzzmm0XMH9jkPlgT53acl/aogOGz3m NrnWQ/mlDlDzzSDtjEj3r6cZXh0t6Hiv3J3GtcBwY2yBRHlMnSTyaRKXq2ctltMyb1pX uViNc0lqAiaxxT8NYXYc2B7p8BgqwAHDMFrrtWhJCc5U9PjreiF2tSTrXX6dWkaGuY+w RxK6QIzSN+aBgCkPD/4nNNI8tJt4I2oo4F9oqXdBVh/0VZatKnNx7XIjmZm6ynDqDF3i IKIg== X-Gm-Message-State: AGi0Pua3xcII+fsal8ES7usoIbF0agjpWn3T47+xyb7LM2H44C46OXvK aOwP24ElSoxFR51ubCVjq1WDoP6bDDhZFx4tNbGVWA== X-Received: by 2002:a9d:7c92:: with SMTP id q18mr20636927otn.281.1589353679188; Wed, 13 May 2020 00:07:59 -0700 (PDT) MIME-Version: 1.0 References: <20200512085944.222637-1-daniel.vetter@ffwll.ch> <20200512085944.222637-10-daniel.vetter@ffwll.ch> <6cfd324e-0443-3a12-6a2c-25a546c68643@gmail.com> In-Reply-To: <6cfd324e-0443-3a12-6a2c-25a546c68643@gmail.com> From: Daniel Vetter Date: Wed, 13 May 2020 09:07:48 +0200 Message-ID: Subject: Re: [RFC 09/17] drm/amdgpu: use dma-fence annotations in cs_submit() To: =?UTF-8?Q?Christian_K=C3=B6nig?= Cc: DRI Development , linux-rdma , intel-gfx , Maarten Lankhorst , LKML , amd-gfx list , Chris Wilson , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Daniel Vetter , "open list:DMA BUFFER SHARING FRAMEWORK" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 13, 2020 at 9:02 AM Christian K=C3=B6nig wrote: > > Am 12.05.20 um 10:59 schrieb Daniel Vetter: > > This is a bit tricky, since ->notifier_lock is held while calling > > dma_fence_wait we must ensure that also the read side (i.e. > > dma_fence_begin_signalling) is on the same side. If we mix this up > > lockdep complaints, and that's again why we want to have these > > annotations. > > > > A nice side effect of this is that because of the fs_reclaim priming > > for dma_fence_enable lockdep now automatically checks for us that > > nothing in here allocates memory, without even running any userptr > > workloads. > > > > Cc: linux-media@vger.kernel.org > > Cc: linaro-mm-sig@lists.linaro.org > > Cc: linux-rdma@vger.kernel.org > > Cc: amd-gfx@lists.freedesktop.org > > Cc: intel-gfx@lists.freedesktop.org > > Cc: Chris Wilson > > Cc: Maarten Lankhorst > > Cc: Christian K=C3=B6nig > > Signed-off-by: Daniel Vetter > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_cs.c > > index 7653f62b1b2d..6db3f3c629b0 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > > @@ -1213,6 +1213,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_pars= er *p, > > struct amdgpu_job *job; > > uint64_t seq; > > int r; > > + bool fence_cookie; > > > > job =3D p->job; > > p->job =3D NULL; > > @@ -1227,6 +1228,8 @@ static int amdgpu_cs_submit(struct amdgpu_cs_pars= er *p, > > */ > > mutex_lock(&p->adev->notifier_lock); > > > > + fence_cookie =3D dma_fence_begin_signalling(); > > + > > /* If userptr are invalidated after amdgpu_cs_parser_bos(), retur= n > > * -EAGAIN, drmIoctl in libdrm will restart the amdgpu_cs_ioctl. > > */ > > @@ -1264,12 +1267,14 @@ static int amdgpu_cs_submit(struct amdgpu_cs_pa= rser *p, > > amdgpu_vm_move_to_lru_tail(p->adev, &fpriv->vm); > > > > ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence); > > + dma_fence_end_signalling(fence_cookie); > > Mhm, this could come earlier in theory. E.g. after pushing the job to > the scheduler. Yeah, I have not much clue about how amdgpu works :-) In practice it doesn't matter much, since the enclosing adev->notifier_lock is a lot more strict about what it allows than the dma_fence signalling fake lock. -Daniel > > Christian. > > > mutex_unlock(&p->adev->notifier_lock); > > > > return 0; > > > > error_abort: > > drm_sched_job_cleanup(&job->base); > > + dma_fence_end_signalling(fence_cookie); > > mutex_unlock(&p->adev->notifier_lock); > > > > error_unlock: > --=20 Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch