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From:   Robin Gong <yibin.gong@nxp.com>
To:     Sascha Hauer <s.hauer@pengutronix.de>
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Subject: RE: [PATCH v7 RESEND 07/13] spi: imx: fix ERR009165
Thread-Topic: [PATCH v7 RESEND 07/13] spi: imx: fix ERR009165
Thread-Index: AQHWJ3cnZ0DWmxBZKkqSbDLRijv4Zqilos2AgAASCaA=
Date:   Wed, 13 May 2020 09:05:33 +0000
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On 2020/05/13 Sascha Hauer <s.hauer@pengutronix.de> wrote:d
> >  drivers/spi/spi-imx.c | 16 ++++++++--------
> >  1 file changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index
> > f4f28a4..70df8e6 100644
> > --- a/drivers/spi/spi-imx.c
> > +++ b/drivers/spi/spi-imx.c
> > @@ -585,8 +585,8 @@ static int mx51_ecspi_prepare_transfer(struct
> spi_imx_data *spi_imx,
> >  	ctrl |=3D mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
> >  	spi_imx->spi_bus_clk =3D clk;
> >
> > -	if (spi_imx->usedma)
> > -		ctrl |=3D MX51_ECSPI_CTRL_SMC;
> > +	/* ERR009165: work in XHC mode as PIO */
> > +	ctrl &=3D ~MX51_ECSPI_CTRL_SMC;
> >
> >  	writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
> >
> > @@ -617,7 +617,7 @@ static void mx51_setup_wml(struct spi_imx_data
> *spi_imx)
> >  	 * and enable DMA request.
> >  	 */
> >  	writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
> > -		MX51_ECSPI_DMA_TX_WML(spi_imx->wml) |
> > +		MX51_ECSPI_DMA_TX_WML(0) |
> >  		MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
> >  		MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
> >  		MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
> @@ -1171,7
> > +1171,11 @@ static int spi_imx_dma_configure(struct spi_master *master)
> >  	tx.direction =3D DMA_MEM_TO_DEV;
> >  	tx.dst_addr =3D spi_imx->base_phys + MXC_CSPITXDATA;
> >  	tx.dst_addr_width =3D buswidth;
> > -	tx.dst_maxburst =3D spi_imx->wml;
> > +	/*
> > +	 * For ERR009165 with tx_wml =3D 0 could enlarge burst size to fifo s=
ize
> > +	 * to speed up fifo filling as possible.
> > +	 */
> > +	tx.dst_maxburst =3D spi_imx->devtype_data->fifo_size;
>=20
> In the next patch this is changed again to:
>=20
> +       if (spi_imx->devtype_data->tx_glitch_fixed)
> +               tx.dst_maxburst =3D spi_imx->wml;
> +       else
> +               tx.dst_maxburst =3D spi_imx->devtype_data->fifo_size;
>=20
> So with tx_glitch_fixed we end up with tx.dst_maxburst being the same as =
two
> patches before which is rather confusing. Better introduce tx_glitch_fixe=
d in
> this patch, or maybe even merge this patch and the next one.
Sorry confused you, I should repleace 'tx_wml=3D0' in the above comments wi=
th ' TX_THRESHOLD=3D0', which means tx transfer dma have to wait all the tx=
 data in tx fifo transferred with ERR009165 rather than generically 'tx_wml=
' (for example --half fifo size used as TX_THRESHOLD). Obviously TX_THRESHO=
LD=3D0 would down performance, so enlarge dst_maxburst to fifo size as PIO =
with ERR009165. After ERR009165 fixed at HW level. TX_THRESHOLD could be us=
ed as common 'spi_imx->wml' so change it back. Will add more detail informa=
tion in v8.