Received: by 2002:a25:868d:0:0:0:0:0 with SMTP id z13csp811890ybk; Wed, 13 May 2020 13:50:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyE6e0Rejh47YiJuhkRWoR1GVLr5jqnihLwKc/jtR9Nv90b3vhf7kjNGcsBVEnjJxvebb5j X-Received: by 2002:aa7:d411:: with SMTP id z17mr1364841edq.203.1589403025277; Wed, 13 May 2020 13:50:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589403025; cv=none; d=google.com; s=arc-20160816; b=e8hgQinUu+gg9EZ2e18tQ7A6v7tJkxbB4BZoX3Dw21LKU1kyhCs0AZMSZQS8A6lxws TIzNo8EZ6WzWAtZNDgkQuvknMlRCYjgToIrhmfmllYQQtpSa5cwdZf1FGRV+rzCdrDjJ W+mpZlpXY3z+SVCYGauu+/NDWXJophpG/dbcOBXEYc4/wS9n/BPObnXH9xM6vhWmmJto rbLFDJyARMlOAdMS3+qiqB133ssTwL1IEli3mnsal0+8q1W4lTaybYWzwkgZi2Ik/ZTZ Ej0ydVuSiUfmwKC+YgL+1FStXARlqXKx1f1pdA2MsMTtfK5XCq3ZFf/b3AlfKrFqoo2l lerA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:organization:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:ironport-sdr:ironport-sdr; bh=eOTWijmolKo23wYxQXVflxv9U/BIjM4ZKTZe0efzqlI=; b=omjnlsXan6m+Hk6OpXWsPvVYuDdyR8V9QOTGfoW+Yb2nXv8JVvqb1COE4t6gWEOiEp 3TWMXTKh5EElm2z59m3DcW6SPYU1UfP3fMXpZHF4pgZdOeckAYDMmqfmJd8zGK2gziYF af/4LffhTTfPS7Vz11agP4bW8WgQ1ay1pPIRfr/RR9Ba4kW01/lal8yLNA5AzKiFY4oB BMz3JFAZraeKm9uUvOOVj9WvtCR0FQWVMgdSC6X3LddYpOkXr7a/nZPD0X+bim6gP3Aq H9TNTgG/VjXEtGPft8TZmqS/oudiFMWJflKOkVXSFvqp4ZsABgeY8eE7vB+YWtN0FHZk Gc5g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dc4si372014edb.565.2020.05.13.13.50.02; Wed, 13 May 2020 13:50:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730291AbgEMQZS (ORCPT + 99 others); Wed, 13 May 2020 12:25:18 -0400 Received: from mga03.intel.com ([134.134.136.65]:47264 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730831AbgEMQZS (ORCPT ); Wed, 13 May 2020 12:25:18 -0400 IronPort-SDR: rG+xkt7GWyR26ljDRgXcC9fEVlX059muwjQC36cHEJhGfOigkHQWxOSm2wvrxfNbEeV264+ciZ 3wLBSgw7Pzbw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2020 09:25:17 -0700 IronPort-SDR: kOFQPychjQRbqGq643hXqXa+zFK0sRN9uGhs37Qj+Z/Dl2Iqg2me8Rd4h0nTd/UOW5HMfUMGA6 JkeYHsGcu5qw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,388,1583222400"; d="scan'208";a="371954293" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.163]) by fmsmga001.fm.intel.com with SMTP; 13 May 2020 09:25:14 -0700 Received: by lahna (sSMTP sendmail emulation); Wed, 13 May 2020 19:25:13 +0300 Date: Wed, 13 May 2020 19:25:13 +0300 From: Mika Westerberg To: Richard Hughes Cc: ptyser@xes-inc.com, Lee Jones , tudor.ambarus@microchip.com, Kate Stewart , allison@lohutok.net, tglx@linutronix.de, jethro@fortanix.com, linux-kernel Subject: Re: [PATCH] mfd: Export LPC attributes for the system SPI chip Message-ID: <20200513162513.GI2571@lahna.fi.intel.com> References: <125a8c31e106dc68e6d3e3395cecc766db7fb897.camel@gmail.com> <20200513070847.GM2571@lahna.fi.intel.com> <20200513091100.GY2571@lahna.fi.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 13, 2020 at 03:13:28PM +0100, Richard Hughes wrote: > On Wed, 13 May 2020 at 10:11, Mika Westerberg > wrote: > > > I can fix up all those, but out of interest how did you "know" the > > > right three digit identifier to use? > > I work for Intel ;-) > > Hah, okay, thanks :) > > > > I'm really wondering if drivers/mfd/lpc_ich.c is the right place for > > > this kind of "just expose one byte of PCI config space" functionality. > > Ideally there is one driver per device. > > My idea in https://github.com/hughsie/spi_lpc was to not actually > register a pci_driver. OK, I see the original code iterated over PCI devices finding anything that matches the IDs in the table. This may be problematic if there is driver bound to the device and accessing the hardware simultaneusly. Although this is just read side and I don't think these registers have any side effects when you read them, so should not be an issue. > > > If this is touching the 00:1f.5 PCI device (SPI-NOR controller) then the > > right place is the intel-spi-pci.c as that's the driver for this > > controller. > > So Cannon Lake, Cannon Point and Ice Lake would go into > drivers/mtd/spi-nor/controllers/intel-spi-pci.c and the systems like > Sunrise Point using an ISA bridge would use drivers/mfd/lpc_ich.c? Yes, something like that. > > We can put this there so that it does not enable the SPI-NOR > > functionality itself and the mark the SPI-NOR functionality only as > > being dangerous or something like that. > > I think getting the distros to enable SPI_INTEL_SPI_PCI might be a > tough sell. Could we perhaps remove the DANGEROUS label as it's not > writeable without a module option? I would like to keep it (the label) there but I think we can label SPI_INTEL_SPI with that instead and then make the -pci.c to work standalone if CONFIG_SPI_INTEL_SPI is not enabled. config SPI_INTEL_SPI tristate "Intel PCH/PCU SPI flash core driver (DANGEROUS)" depends on SPI_INTEL_SPI_PCI || SPI_INTEL_SPI_PLATFORM ... config SPI_INTEL_SPI_PCI tristate "Intel PCH/PCU SPI flash PCI driver" depends on PCI ... Then distros could enable only CONFIG_SPI_INTEL_SPI_PCI which would only expose the security bits. Of course I'm open to any other ideas :)