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[23.128.96.18]) by mx.google.com with ESMTP id j3si931126ejb.294.2020.05.15.03.54.37; Fri, 15 May 2020 03:55:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726097AbgEOKxS (ORCPT + 99 others); Fri, 15 May 2020 06:53:18 -0400 Received: from mga12.intel.com ([192.55.52.136]:23818 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725968AbgEOKxS (ORCPT ); Fri, 15 May 2020 06:53:18 -0400 IronPort-SDR: ZEIiMclK4CAEABoksrY00BYJtZEszQm6oJIz4TqOPd+Uso7A/qffUDWVQXIXRNflsQX+Adfoad SOMw5uegyY5Q== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2020 03:53:18 -0700 IronPort-SDR: Z9jMbhI0bOSAkUctcFuR95gd0AMX/8Mg684Ffh1OGKjfyYJ8M6hkVl1s3Jyl+BbGleFFixE9ab lPkSNLmIyqsQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,395,1583222400"; d="scan'208";a="341946497" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by orsmga001.jf.intel.com with ESMTP; 15 May 2020 03:53:11 -0700 Received: from andy by smile with local (Exim 4.93) (envelope-from ) id 1jZXxp-006qHS-UQ; Fri, 15 May 2020 13:53:13 +0300 Date: Fri, 15 May 2020 13:53:13 +0300 From: Andy Shevchenko To: Vinod Koul Cc: Serge Semin , Serge Semin , Vineet Gupta , Viresh Kumar , Dan Williams , Alexey Malahov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , Arnd Bergmann , Rob Herring , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 3/6] dmaengine: dw: Set DMA device max segment size parameter Message-ID: <20200515105313.GL185537@smile.fi.intel.com> References: <20200306131048.ADBE18030797@mail.baikalelectronics.ru> <20200508105304.14065-1-Sergey.Semin@baikalelectronics.ru> <20200508105304.14065-4-Sergey.Semin@baikalelectronics.ru> <20200508112152.GI185537@smile.fi.intel.com> <20200511211622.yuh3ls2ay76yaxrf@mobilestation> <20200512123551.GX185537@smile.fi.intel.com> <20200515061601.GG333670@vkoul-mobl> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200515061601.GG333670@vkoul-mobl> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 15, 2020 at 11:46:01AM +0530, Vinod Koul wrote: > On 12-05-20, 15:35, Andy Shevchenko wrote: > > On Tue, May 12, 2020 at 12:16:22AM +0300, Serge Semin wrote: > > > On Fri, May 08, 2020 at 02:21:52PM +0300, Andy Shevchenko wrote: > > > > On Fri, May 08, 2020 at 01:53:01PM +0300, Serge Semin wrote: ... > > My point here that we probably can avoid complications till we have real > > hardware where it's different. As I said I don't remember a such, except > > *maybe* Intel Medfield, which is quite outdated and not supported for wider > > audience anyway. > > IIRC Intel Medfield has couple of dma controller instances each one with > different parameters *but* each instance has same channel configuration. That's my memory too. > I do not recall seeing that we have synthesis parameters per channel > basis... But I maybe wrong, it's been a while. Exactly, that's why I think we better simplify things till we will have real issue with it. I.o.w. no need to solve the problem which doesn't exist. -- With Best Regards, Andy Shevchenko