Received: by 2002:a25:868d:0:0:0:0:0 with SMTP id z13csp591866ybk; Fri, 15 May 2020 08:32:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxnMUjPto3r9WxNqGSSPzqH6nE8sKLU1wAZRW5VNLB9AwvSDTX/vWP3X3KXZ5imSqacshsr X-Received: by 2002:a05:6402:297:: with SMTP id l23mr3559984edv.57.1589556740405; Fri, 15 May 2020 08:32:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589556740; cv=none; d=google.com; s=arc-20160816; b=C4Yqnir1PRXI+DgD3XJH/CUSfudODnHLfGVAUf7MmeneVquTyqssIN34y8xKA/BU/0 K0uBA01hSUelFuzL5rlpt7mhH1vdSFar0FmC68y5XuJqaxD7eCLvHZpTQLzZwvaaJGo/ rQBOBg1+nm+u6LfhfBduKUpjq+C+FT+6EliCQjWuhFIv7t6ZgvdcqRCTMMFfbrZAZ8/M 8fyoiR9bV3xVgUjBjz8T9ikRjj1wVe5erQS8lMfqkX2p1f+Pxd/bPuygxozR2K/EVqgY Pl6hyRyyeb/twXPfuDfZTFDoWD9xGgNmr004cMXyNTGI+AZiL53WRvLueZWAjsj6S3Ap 9eUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=+xUhVbxFXxzBaBrNSzILpkBVCBkKMsuYo4TwAE5ZHQI=; b=Fm7SnzCOr4T7gppCrQILh52+54ZyCmXCajArDGzG3Nc+AMygNHTr62C1Z4ubl0yxJG ySZbZyqkzRNcJw6Wy5BU2/nOpQU7K8Lw9xnTFSl1YB41yUewy7YCUvgl3Uqc5LNqXF39 kxvOM8nKwt7SZ36FQv+LN/gq/HMOJvngevM9GWMUAEsT9T+NjEEIzXhdoUCBP0tmv59W gRLhd/wFWqzwB+HUTfhNRobuv8zkVppHW/xx1GAQF/zDoXeNPSdUeekjt9PqitknUrMa tI2PjeOyM6S31fVk/EN0NYBtVSsvoHrfnLl6zA7BKEM7wxNgpyispzLjdQIggFXUcjsz 09UQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cy20si1290916edb.345.2020.05.15.08.31.57; Fri, 15 May 2020 08:32:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726729AbgEOPal (ORCPT + 99 others); Fri, 15 May 2020 11:30:41 -0400 Received: from foss.arm.com ([217.140.110.172]:58186 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726249AbgEOPak (ORCPT ); Fri, 15 May 2020 11:30:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 26C1D2F; Fri, 15 May 2020 08:30:40 -0700 (PDT) Received: from [10.57.27.64] (unknown [10.57.27.64]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C26B23F71E; Fri, 15 May 2020 08:30:37 -0700 (PDT) Subject: Re: [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support To: Lars Povlsen , Marc Zyngier Cc: devicetree@vger.kernel.org, Alexandre Belloni , Arnd Bergmann , Stephen Boyd , Linus Walleij , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, SoC Team , Michael Turquette , linux-arm-kernel@lists.infradead.org, Olof Johansson , Microchip Linux Driver Support , Steen Hegelund References: <20200513125532.24585-1-lars.povlsen@microchip.com> <20200513125532.24585-7-lars.povlsen@microchip.com> <2d230dab95ee96727a42f9c242c93c18@misterjones.org> <871rnlp740.fsf@soft-dev15.microsemi.net> From: Robin Murphy Message-ID: <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> Date: Fri, 15 May 2020 16:30:36 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <871rnlp740.fsf@soft-dev15.microsemi.net> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-05-15 16:09, Lars Povlsen wrote: [...] >>> + cpu0: cpu@0 { >>> + compatible = "arm,cortex-a53", "arm,armv8"; Side note: only one compatible string for the real CPU please, running a DT bindings check should complain about that. >>> + device_type = "cpu"; >>> + reg = <0x0 0x0>; >>> + enable-method = "spin-table"; >> >> Really? This is 2020, not 2012 any more. Surely a new platform >> boots using PSCI, and not *this*. >> > > We don't currently support PSCI. The platform does not have TrustZone, > hence we don't use ATF. AIUI, part of the purpose of ATF is to provide a nice standardised platform interface regardless of whether you care about Secure software or not. It shouldn't take much to knock up a trivial ATF port that just uses an internal spin-table for its PSCI backend - in fact I suspect that's probably just a copy-paste from the RPi3 port ;) Robin.