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[23.128.96.18]) by mx.google.com with ESMTP id i12si1547915edn.103.2020.05.15.08.43.25; Fri, 15 May 2020 08:43:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726290AbgEOPl5 (ORCPT + 99 others); Fri, 15 May 2020 11:41:57 -0400 Received: from mout.kundenserver.de ([212.227.126.134]:57649 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726188AbgEOPl5 (ORCPT ); Fri, 15 May 2020 11:41:57 -0400 Received: from mail-qt1-f179.google.com ([209.85.160.179]) by mrelayeu.kundenserver.de (mreue011 [212.227.15.129]) with ESMTPSA (Nemesis) id 1Mfpf7-1itw4J3q7l-00gDGA for ; Fri, 15 May 2020 17:41:55 +0200 Received: by mail-qt1-f179.google.com with SMTP id p12so2264981qtn.13 for ; Fri, 15 May 2020 08:41:54 -0700 (PDT) X-Gm-Message-State: AOAM533tlzVeHdPQHmIcySd7Rx+CQAsb0LGzHxzBBLyb4P2hx71xMPaZ eXTdgn/bsXZKMbBVZiBUETLDApkWvvtprEowJNY= X-Received: by 2002:ac8:518f:: with SMTP id c15mr4010468qtn.142.1589557313823; Fri, 15 May 2020 08:41:53 -0700 (PDT) MIME-Version: 1.0 References: <20200504091018.GA24897@afzalpc> <20200511142113.GA31707@afzalpc> <20200512104758.GA12980@afzalpc> <20200514111755.GA4997@afzalpc> <20200514162535.GP1551@shell.armlinux.org.uk> <20200514234013.GQ1551@shell.armlinux.org.uk> In-Reply-To: <20200514234013.GQ1551@shell.armlinux.org.uk> From: Arnd Bergmann Date: Fri, 15 May 2020 17:41:37 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: ARM: static kernel in vmalloc space To: Russell King - ARM Linux admin Cc: afzal mohammed , Linux ARM , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:VSN5a7/1IK/d0dPd83w7C9xX0pwKbsep9TBmkWFV1U/fQZ2nJAm kklnrLSzZziDLjUw02+hyKSLLekmT/BEiuDEg2oA3YxCOIyNGhUM3X49/wo87cieSE4hIAc 77ovC1m8P4pOVlKZTVsrWzRfusSulRMJqRLvJnnmms2bI6tdb3UxiTZKqkoSfiIiuuQW1HZ Ww6JLdWvmXcoQOLta+8ow== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:6fHZV0Wcic0=:0EEmYVXB+8hvrbJdYqSwqm XS7LUGBeisryIxlws0anbtsSPJ03dq1NzqsyvX5L5Tl4f2P8BqdXetamUpE4VfDVYJ+PEYla2 xve/v+hag179j+hvjrFMT0Xw+enqb92G6WUyRPwNHR6UK+HfDHr7CFDvOY9Nmq/Cf7voyeks/ 38r7zYg+FKhJEV+EQqZDYsJi8dCRJnZEo93xcTf+5viCGax84zbjXuBqcYoRuTnBS1+Ov+ewc WkfdOyJ3n3pE7/bQI01MlW48Z08MvQhbOYuQMezgfOYBLNMVdNHgVwGz6RJ8NdG0Va38Db612 JSl4bQOHLQudrVrJa4oiiHmwBYVPo4DJt0gmBXMbfbmvO6A3uOpYKx3kA0V9mFLU5Ygn2l+58 XnMkEh5j5cc84pV89k4RqRQvMTBTt5L8sBiSQNkcxhHXlwPMWrMesotT6pKR/FF1ujdyzdN6T KrwwjSF+mAwU4esRBsty7nwZ54CFxZn1um3B4EBUcFQjx8QZM72R+4H+1MJdlcSf4T6DYWwyh 3dwZpijOUsOo8wAad/8lbLrtqD+72Ue7OA/08bqijCwAraMSdHCpGUQePnJw58EUN/FEM4+YN AqyWUibJTdq6/X0hWPo0M7y709UuERK3bSBYHy1kPaHTd8hQgJlubRTfrlTRrhtLXywY+AIKb CwWZ/7FAtCcJDwmgo7Ben2l9QpODv8/hEO0oKUuthGvmo+x7Ftv1DOpyhx7lV4IZu1aoiu+oJ sYX2IuMLUTh6N2TzTdJvQcf1R2VOLPFWi7NGdwKOY7aS/oWUtAshyciUnAavmKZuHEVxengQt pAtvswggSpbu+LIW17I7cdv1e/SLjoUqZjbiyqxilyiElHmq14= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 15, 2020 at 1:40 AM Russell King - ARM Linux admin wrote: > On Thu, May 14, 2020 at 11:12:01PM +0200, Arnd Bergmann wrote: > > On Thu, May 14, 2020 at 6:25 PM Russell King - ARM Linux admin > > wrote: > > > On Thu, May 14, 2020 at 02:41:11PM +0200, Arnd Bergmann wrote: > > > > On Thu, May 14, 2020 at 1:18 PM afzal mohammed wrote: > > I expected the non-aliasing VIPT caches to work the same as PIPT, can > > you clarify if there is something to be aware of for those? I see that some > > ARMv8 chips and most ARMv6 chips (not OMAP2 and Realview) are > > of that kind, and at we clearly don't want to break running on ARMv8 at > > least. > > There are some aliasing VIPT implementations on ARMv6, but I don't > remember how common. I thought it was only realview-pb and omap2, but it seems there are more, at least ast2500 is an important example. I could not find information about integrator-cp and picoxcell. For reference, this is a list of the arm11 chips we currently support, with the aliasing dcache ones marked '*': * ast2500: armv6k, arm1176, ??KB aliasing VIPT bcm2835: armv6k, arm1176, 16KB non-aliasing VIPT cns3xxx: armv6k, arm11mpcore, 32kb PIPT imx3: armv6, arm1136r0, 16kb non-aliasing VIPT integrator CM1136JF-S core module: arm1136r?, 16kb non-aliasing VIPT ? integrator CTB36 core tile: arm1136r?, ??? ox820: armv6k, arm11mpcore, ??KB PIPT * omap2: armv6, arm1136r0, 32kb aliasing VIPT ? picoxcell: armv6k, arm11?? * realview-pb1176: armv6k, arm1176, 32kb aliasing VIPT realview-eb with 1176 core tile: armv6k, 16kb non-aliasing VIPT realview-eb with 11mpcore core tile: armv6k, 32kb PIPT s3c64xx: armv6k, arm1176, 16kb non-aliasing VIPT wm8750: armv6k, arm1176: 16kb non-aliasing VIPT Arnd