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[23.128.96.18]) by mx.google.com with ESMTP id x24si6750034ejc.301.2020.05.18.04.33.57; Mon, 18 May 2020 04:34:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="B6TE/Mkb"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727779AbgERLcM (ORCPT + 99 others); Mon, 18 May 2020 07:32:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:60612 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726585AbgERLcL (ORCPT ); Mon, 18 May 2020 07:32:11 -0400 Received: from ziggy.de (unknown [213.195.113.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 953BB207E8; Mon, 18 May 2020 11:32:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589801530; bh=ySMXvFxjnjGVVmFKHMBpG4Jqc313FwRKoqQxg/VJy5k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B6TE/MkbaMeQc5J0I3tjnlf1LkQdvrrtyPZvMAVzCZuiNoRQ3OdQGX0siGmPBsVMO +CR/X6YvWtUmBPielLxtDbbm3/4wRFHMg09FwjTqyJgNGOyKaoJ6Yaa2iom/I01VE+ aSHqpsRvzRIlMvyn54Y1jQ760CeKo28Gd/4CpTLQ= From: matthias.bgg@kernel.org To: Rob Herring , Matthias Brugger , Michael Turquette , Stephen Boyd Cc: mtk01761 , devicetree@vger.kernel.org, Allison Randal , linux-kernel@vger.kernel.org, Thomas Gleixner , linux-mediatek@lists.infradead.org, Kate Stewart , Greg Kroah-Hartman , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/4] clk/soc: mediatek: mt6779: Bind clock driver from platform device Date: Mon, 18 May 2020 13:31:55 +0200 Message-Id: <20200518113156.25009-3-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200518113156.25009-1-matthias.bgg@kernel.org> References: <20200518113156.25009-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Matthias Brugger The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger --- drivers/clk/mediatek/clk-mt6779-mm.c | 9 ++------- drivers/soc/mediatek/mtk-mmsys.c | 8 ++++++++ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt6779-mm.c b/drivers/clk/mediatek/clk-mt6779-mm.c index fb5fbb8e3e41..059c1a41ac7a 100644 --- a/drivers/clk/mediatek/clk-mt6779-mm.c +++ b/drivers/clk/mediatek/clk-mt6779-mm.c @@ -84,15 +84,11 @@ static const struct mtk_gate mm_clks[] = { GATE_MM1(CLK_MM_DISP_OVL_FBDC, "mm_disp_ovl_fbdc", "mm_sel", 16), }; -static const struct of_device_id of_match_clk_mt6779_mm[] = { - { .compatible = "mediatek,mt6779-mmsys", }, - {} -}; - static int clk_mt6779_mm_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct device_node *node = dev->parent->of_node; struct clk_onecell_data *clk_data; - struct device_node *node = pdev->dev.of_node; clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); @@ -106,7 +102,6 @@ static struct platform_driver clk_mt6779_mm_drv = { .probe = clk_mt6779_mm_probe, .driver = { .name = "clk-mt6779-mm", - .of_match_table = of_match_clk_mt6779_mm, }, }; diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index fee64c8d3020..dc15808cf3a3 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -88,6 +88,10 @@ static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { .clk_driver = "clk-mt2712-mm", }; +static const struct mtk_mmsys_driver_data mt6779_mmsys_driver_data = { + .clk_driver = "clk-mt6779-mm", +}; + static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = { .clk_driver = "clk-mt6797-mm", }; @@ -343,6 +347,10 @@ static const struct of_device_id of_match_mtk_mmsys[] = { .compatible = "mediatek,mt2712-mmsys", .data = &mt2712_mmsys_driver_data, }, + { + .compatible = "mediatek,mt6779-mmsys", + .data = &mt6779_mmsys_driver_data, + }, { .compatible = "mediatek,mt6797-mmsys", .data = &mt6797_mmsys_driver_data, -- 2.26.2