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[23.128.96.18]) by mx.google.com with ESMTP id d20si5786313edx.529.2020.05.18.07.01.35; Mon, 18 May 2020 07:02:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=cYf9JHC+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727922AbgEROAD (ORCPT + 99 others); Mon, 18 May 2020 10:00:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726989AbgEROAC (ORCPT ); Mon, 18 May 2020 10:00:02 -0400 Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EC4EC061A0C for ; Mon, 18 May 2020 07:00:02 -0700 (PDT) Received: by mail-wm1-x342.google.com with SMTP id m12so9414025wmc.0 for ; Mon, 18 May 2020 07:00:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zgSEgyu5An5GyigcNkf1Yhsncd+sLucumkdkFEyxqlE=; b=cYf9JHC+73yCMVT342d6rL9GyqewbyYRsjqMCwiojwe8y3EPfjk/tOSYZipRAHdIYI SPnYWG245PFUoHKp1G4FRD9y8QfNkRVI4+hDa1ag2g6mNDeCbjQsmfma5N4bjZq7Yarx +Qmh24WOPdeYQMoTEg26Pir/LmhRFca8dVHwELaUTf0FbAx4tNUa3ogb7Gtn7Ty/pkLo W/B0FsoLM7LgVirbOoJiXyJnStqLlmVgnyaOo6awM3nkj3WcYRg2YaKgies9DJk8+nk2 uRGK9cdYH8TsqHAhnv3k8Offqy6zatzwpI+TSuDuPptiW9rKfAP7ux9GdzkJPp9N1Tbw 6JDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zgSEgyu5An5GyigcNkf1Yhsncd+sLucumkdkFEyxqlE=; b=HZRwxZq8tpn1IIN+D/alXlUomcSUbXB3bH+247U/2iPqNMDazfSiPwrozSGtFRwM5G RbVf5FJD0mOXQr/5VL5nitoPYCajcHZhuZOuGwAr5ieTHDEyK9jGtkFSHuIW3reSA7Lp b4Gz0bo42ZbYdIoqeaUQ7CLnTj6HtD72ljEQ7htAbbWV1k7L5wKOL1ROzJEOYUVng73E D7i+1Tgc+PyvtdVPh0xjTh+LXPVOKQsZZ9/oWwhbCThXpFYGU1P0bjW5kl/+2eVbRWlG 1erGlvhNaOH3Nvf3POEzUWEpuj0ouhTFeWLN8Ou05jcX269V/gJEeRZb40+CChHeO9hw eM8Q== X-Gm-Message-State: AOAM532YONGRFj/0hhXoVyM90gmZY1QvAHMsYRFrODnTv45ggYAv02vv A77BsFGIXxrr/FLSKdNjb68= X-Received: by 2002:a1c:cc1a:: with SMTP id h26mr18838818wmb.127.1589810401059; Mon, 18 May 2020 07:00:01 -0700 (PDT) Received: from localhost.localdomain ([2a01:598:b884:8d4:84ab:c471:b6eb:fcab]) by smtp.gmail.com with ESMTPSA id 81sm18114519wme.16.2020.05.18.06.59.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2020 07:00:00 -0700 (PDT) From: Bean Huo To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, s.hauer@pengutronix.de, boris.brezillon@collabora.com, derosier@gmail.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, huobean@gmail.com, Bean Huo Subject: [PATCH v4 2/5] mtd: rawnand: Add {pre,post}_erase hooks in nand_chip_ops Date: Mon, 18 May 2020 15:59:40 +0200 Message-Id: <20200518135943.11749-3-huobean@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200518135943.11749-1-huobean@gmail.com> References: <20200518135943.11749-1-huobean@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bean Huo Add {pre,post}_erase hooks in the structure nand_chip_ops: pre_erase will be called before a block is physically erased. post_erase will be called after a block is erased. Signed-off-by: Bean Huo --- drivers/mtd/nand/raw/nand_base.c | 18 +++++++++++++----- include/linux/mtd/rawnand.h | 16 ++++++++++------ 2 files changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 7af21cf49290..e90b7ae878e2 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4318,7 +4318,7 @@ static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr, int allowbbt) { - int page, pages_per_block, ret, chipnr; + int page, pages_per_block, ret, chipnr, eb; loff_t len; pr_debug("%s: start = 0x%012llx, len = %llu\n", @@ -4372,16 +4372,24 @@ int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr, (page + pages_per_block)) chip->pagecache.page = -1; - ret = nand_erase_op(chip, (page & chip->pagemask) >> - (chip->phys_erase_shift - chip->page_shift)); + eb = (page & chip->pagemask) >> + (chip->phys_erase_shift - chip->page_shift); + + if (chip->ops.pre_erase) + chip->ops.pre_erase(chip, eb); + + ret = nand_erase_op(chip, eb); if (ret) { - pr_debug("%s: failed erase, page 0x%08x\n", - __func__, page); + pr_debug("%s: failed erase block %d, page 0x%08x\n", + __func__, eb, page); instr->fail_addr = ((loff_t)page << chip->page_shift); goto erase_exit; } + if (chip->ops.post_erase) + chip->ops.post_erase(chip, eb); + /* Increment page address and decrement length */ len -= (1ULL << chip->phys_erase_shift); page += pages_per_block; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 62932cc3ed8d..df3d4b3ef2f6 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1027,12 +1027,14 @@ struct nand_legacy { /** * struct nand_chip_ops - NAND Chip specific operations - * @suspend: [REPLACEABLE] specific NAND device suspend operation - * @resume: [REPLACEABLE] specific NAND device resume operation - * @lock_area: [REPLACEABLE] specific NAND chip lock operation - * @unlock_area: [REPLACEABLE] specific NAND chip unlock operation - * @setup_read_retry: [FLASHSPECIFIC] flash (vendor) specific function for - * setting the read-retry mode. Mostly needed for MLC NAND. + * @suspend: [REPLACEABLE] specific NAND device suspend operation + * @resume: [REPLACEABLE] specific NAND device resume operation + * @lock_area: [REPLACEABLE] specific NAND chip lock operation + * @unlock_area: [REPLACEABLE] specific NAND chip unlock operation + * @setup_read_retry: [FLASHSPECIFIC] flash (vendor) specific function for + * setting the read-retry mode. Mostly needed for MLC NAND. + * @pre_erase: [FLASHSPECIFIC] prepare a physical erase block + * @post_erase: [FLASHSPECIFIC] physical block erase post */ struct nand_chip_ops { int (*suspend)(struct nand_chip *chip); @@ -1040,6 +1042,8 @@ struct nand_chip_ops { int (*lock_area)(struct nand_chip *chip, loff_t ofs, u64 len); int (*unlock_area)(struct nand_chip *chip, loff_t ofs, u64 len); int (*setup_read_retry)(struct nand_chip *chip, int retry_mode); + int (*pre_erase)(struct nand_chip *chip, u32 eraseblock); + int (*post_erase)(struct nand_chip *chip, u32 eraseblock); }; /** -- 2.17.1