Received: by 2002:a25:868d:0:0:0:0:0 with SMTP id z13csp2823162ybk; Mon, 18 May 2020 08:45:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyShk5h/9qDllesPAl9P+uU/YIsKKqwIHfl/rRIwgIkLACGIBly3bQ2XP0YxJ/wsspYGW3X X-Received: by 2002:a17:906:90c1:: with SMTP id v1mr14715828ejw.322.1589816731060; Mon, 18 May 2020 08:45:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589816731; cv=none; d=google.com; s=arc-20160816; b=VmWGz9X15sPmy0ftIAg+XXaduuPWlKikP7rEXriEA0KO6dqlLRgvcY6Qpdzj7uyDBm KYUyRmrKv1oA4PLIuuMOik3SL16pbIj6KIxW8KTOo/ocL1Ztf3vsrF42bsiBDV4Keyze fyAhHoiDVuID+8A96mBK06TaLoFU/SyG9PrmyR6zlfbjQS+D1J8J/zceDO2td8GQRNbV Uto4SWwpL6fLOF32NWy906EOthRIDzts8iMHd6iF8rkxlCAs5ubAIxYd6RTySKRKVRko z+T3l4QyyuFoh5kngU2Ok7JepG0AueBfld+hknhWj7ZbV6cYvAjiCsLQA8SmKg72PPKj Ul1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-language :content-transfer-encoding:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=9vOgHDwdjHw7cAs4Jei5lrgjJwrtqE5lNvx4B+8DE4s=; b=krDyLZat4LwEwV69AA1QvHAH+E2YbWyqFW443QcLj+kbp827AqEBl4FJ5hX/o2BlZc ZxxfBPEfDz2194uBsa7sRU6pWkHP2FXjklbSb7aYTZeGLCuSKRxKWj14lsvTRC5u9OEc 05weM3ClEw2hb0X2R1ckhTGCgNHbhJ24qjOmq6C7Rpkem/Vpa03/UGpvb5gngLcoqtYA V8pLXW41lymu4/dLDw4kmrles+922yVsEsPqvFdfEYpz2TjaEfVwMGJxiP7lwFtz0mB3 mdt3i5wjBkmtH+o/6x9gOQs9WECu8wBF2je3RRhBvWswapB8hNsR06KWDwrSWGUZjhQa jJRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p2si6020255edm.289.2020.05.18.08.45.08; Mon, 18 May 2020 08:45:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727973AbgERPlT (ORCPT + 99 others); Mon, 18 May 2020 11:41:19 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:4857 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726958AbgERPlT (ORCPT ); Mon, 18 May 2020 11:41:19 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 6737BA8FA906232413BF; Mon, 18 May 2020 23:41:00 +0800 (CST) Received: from [127.0.0.1] (10.166.215.93) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Mon, 18 May 2020 23:40:53 +0800 Subject: Re: [PATCH 09/10] timer-riscv: Fix undefined riscv_time_val To: Daniel Lezcano , Palmer Dabbelt , CC: Paul Walmsley , , , , References: <66121f9a-48f3-d3a5-7c96-d71397e12aed@linaro.org> From: Kefeng Wang Message-ID: <0bc3eb36-7b9d-7c86-130c-68b566e85c10@huawei.com> Date: Mon, 18 May 2020 23:40:52 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <66121f9a-48f3-d3a5-7c96-d71397e12aed@linaro.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-Originating-IP: [10.166.215.93] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020/5/18 22:09, Daniel Lezcano wrote: > On 13/05/2020 23:14, Palmer Dabbelt wrote: >> On Sun, 10 May 2020 19:20:00 PDT (-0700), wangkefeng.wang@huawei.com wrote: >>> ERROR: modpost: "riscv_time_val" [crypto/tcrypt.ko] undefined! >>> >>> Reported-by: Hulk Robot >>> Signed-off-by: Kefeng Wang >>> --- >>>  drivers/clocksource/timer-riscv.c | 1 + >>>  1 file changed, 1 insertion(+) >>> >>> diff --git a/drivers/clocksource/timer-riscv.c >>> b/drivers/clocksource/timer-riscv.c >>> index c4f15c4068c0..071b8c144027 100644 >>> --- a/drivers/clocksource/timer-riscv.c >>> +++ b/drivers/clocksource/timer-riscv.c >>> @@ -19,6 +19,7 @@ >>> >>>  u64 __iomem *riscv_time_cmp; >>>  u64 __iomem *riscv_time_val; >>> +EXPORT_SYMBOL(riscv_time_val); >>> >>>  static inline void mmio_set_timer(u64 val) >>>  { >> Reviewed-by: Palmer Dabbelt >> Acked-by: Palmer Dabbelt >> >> Adding the clocksource maintainers.  Let me know if you want this >> through my >> tree, I'm assuming you want it through your tree. > How can we end up by an export symbol here ?! Hi Danile, Found this build error when CONFIG_RISCV_M_MODE=y and CONFIG_RISCV_SBI is not, see patch "4f9bbcefa142 riscv: add support for MMIO access to the timer registers" thanks. > >