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([2a01:e34:ed2f:f020:9e7:3ac5:a930:2cd8]) by smtp.googlemail.com with ESMTPSA id z11sm17107463wrr.32.2020.05.18.13.18.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 May 2020 13:18:27 -0700 (PDT) Subject: Re: [PATCH v7 5/6] clocksource: Add Low Power STM32 timers driver To: Benjamin Gaignard , fabrice.gasnier@st.com, lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, tglx@linutronix.de Cc: devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Benjamin Gaignard , Pascal Paillet References: <20200420121620.2099-1-benjamin.gaignard@st.com> <20200420121620.2099-6-benjamin.gaignard@st.com> From: Daniel Lezcano Message-ID: <9f737934-d92c-9ddf-f6fb-3ee64057ea18@linaro.org> Date: Mon, 18 May 2020 22:18:26 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20200420121620.2099-6-benjamin.gaignard@st.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/04/2020 14:16, Benjamin Gaignard wrote: > From: Benjamin Gaignard > > Implement clock event driver using low power STM32 timers. > Low power timer counters running even when CPUs are stopped. > It could be used as clock event broadcaster to wake up CPUs but not like > a clocksource because each it rise an interrupt the counter restart from 0. > > Low power timers have a 16 bits counter and a prescaler which allow to > divide the clock per power of 2 to up 128 to target a 32KHz rate. > > Signed-off-by: Benjamin Gaignard > Signed-off-by: Pascal Paillet Acked-by: Daniel Lezcano [ ... ] -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog