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[23.128.96.18]) by mx.google.com with ESMTP id ba4si6502815edb.479.2020.05.18.16.49.21; Mon, 18 May 2020 16:49:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728425AbgERXri (ORCPT + 99 others); Mon, 18 May 2020 19:47:38 -0400 Received: from mga18.intel.com ([134.134.136.126]:49255 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727835AbgERXri (ORCPT ); Mon, 18 May 2020 19:47:38 -0400 IronPort-SDR: sdB39/SxIwmCj0lrIELXnAJyDmcHZEW8sGjT43CYpRS/MTS4xgZc80KHh8vP4NK3CC9t5wMHUS EQYv6v5DgXtA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2020 16:47:37 -0700 IronPort-SDR: a/75CUBbMjozD92kCKohOYbINuo8CpBIovvYrJRyaHfmqmEieFFfsnNKlLmvQ6DkoJxMpBNBZm naLb/0VGqWXQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,408,1583222400"; d="scan'208";a="342962843" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga001.jf.intel.com with ESMTP; 18 May 2020 16:47:36 -0700 Message-ID: <075c5757d6c4d3813f7ae45288b765d76de8b6fc.camel@intel.com> Subject: Re: [PATCH v10 01/26] Documentation/x86: Add CET description From: Yu-cheng Yu To: Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang Date: Mon, 18 May 2020 16:47:42 -0700 In-Reply-To: <0f751be6d25364c25ee4bddc425b61e626dcd942.camel@intel.com> References: <20200429220732.31602-1-yu-cheng.yu@intel.com> <20200429220732.31602-2-yu-cheng.yu@intel.com> <5cc163ff9058d1b27778e5f0a016c88a3b1a1598.camel@intel.com> <44c055342bda4fb4730703f987ae35195d1d0c38.camel@intel.com> <32235ffc-6e6c-fb3d-80c4-a0478e2d0e0f@intel.com> <631f071c-c755-a818-6a97-b333eb1fe21c@intel.com> <0f751be6d25364c25ee4bddc425b61e626dcd942.camel@intel.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.32.4 (3.32.4-1.fc30) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2020-05-15 at 19:53 -0700, Yu-cheng Yu wrote: > On Fri, 2020-05-15 at 16:56 -0700, Dave Hansen wrote: > > On 5/15/20 4:29 PM, Yu-cheng Yu wrote: > > > [...] > > > I have run them with CET enabled. All of them pass, except for the following: > > > Sigreturn from 64-bit to 32-bit fails, because shadow stack is at a 64-bit > > > address. This is understandable. > > [...] > > One a separate topic: You ran the selftests and one failed. This is a > > *MASSIVE* warning sign. It should minimally be described in your cover > > letter, and accompanied by a fix to the test case. It is absolutely > > unacceptable to introduce a kernel feature that causes a test to fail. > > You must either fix your kernel feature or you fix the test. > > > > This code can not be accepted until this selftests issue is rectified. The x86/sigreturn test constructs 32-bit ldt entries, and does sigreturn from 64-bit to 32-bit context. We do not have a way to construct a static 32-bit shadow stack. Why do we want that? I think we can simply run the test with CET disabled. Yu-cheng