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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Enric: Enric Balletbo i Serra =E6=96=BC 2020=E5=B9= =B45=E6=9C=8819=E6=97=A5 =E9=80=B1=E4=BA=8C =E4=B8=8B=E5=8D=885:40=E5=AF=AB= =E9=81=93=EF=BC=9A > > There are some `static const u8` variables that are not used, this > triggers a warning building with `make W=3D1`, it is safe to remove them, > so do it and make the compiler more happy. > Reviewed-by: Chun-Kuang Hu > Signed-off-by: Enric Balletbo i Serra > --- > > .../gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 48 ------------------- > 1 file changed, 48 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu= /drm/mediatek/mtk_mt8173_hdmi_phy.c > index 1c3575372230..827b93786fac 100644 > --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > @@ -107,54 +107,6 @@ > #define RGS_HDMITX_5T1_EDG (0xf << 4) > #define RGS_HDMITX_PLUG_TST BIT(0) > > -static const u8 PREDIV[3][4] =3D { > - {0x0, 0x0, 0x0, 0x0}, /* 27Mhz */ > - {0x1, 0x1, 0x1, 0x1}, /* 74Mhz */ > - {0x1, 0x1, 0x1, 0x1} /* 148Mhz */ > -}; > - > -static const u8 TXDIV[3][4] =3D { > - {0x3, 0x3, 0x3, 0x2}, /* 27Mhz */ > - {0x2, 0x1, 0x1, 0x1}, /* 74Mhz */ > - {0x1, 0x0, 0x0, 0x0} /* 148Mhz */ > -}; > - > -static const u8 FBKSEL[3][4] =3D { > - {0x1, 0x1, 0x1, 0x1}, /* 27Mhz */ > - {0x1, 0x0, 0x1, 0x1}, /* 74Mhz */ > - {0x1, 0x0, 0x1, 0x1} /* 148Mhz */ > -}; > - > -static const u8 FBKDIV[3][4] =3D { > - {19, 24, 29, 19}, /* 27Mhz */ > - {19, 24, 14, 19}, /* 74Mhz */ > - {19, 24, 14, 19} /* 148Mhz */ > -}; > - > -static const u8 DIVEN[3][4] =3D { > - {0x2, 0x1, 0x1, 0x2}, /* 27Mhz */ > - {0x2, 0x2, 0x2, 0x2}, /* 74Mhz */ > - {0x2, 0x2, 0x2, 0x2} /* 148Mhz */ > -}; > - > -static const u8 HTPLLBP[3][4] =3D { > - {0xc, 0xc, 0x8, 0xc}, /* 27Mhz */ > - {0xc, 0xf, 0xf, 0xc}, /* 74Mhz */ > - {0xc, 0xf, 0xf, 0xc} /* 148Mhz */ > -}; > - > -static const u8 HTPLLBC[3][4] =3D { > - {0x2, 0x3, 0x3, 0x2}, /* 27Mhz */ > - {0x2, 0x3, 0x3, 0x2}, /* 74Mhz */ > - {0x2, 0x3, 0x3, 0x2} /* 148Mhz */ > -}; > - > -static const u8 HTPLLBR[3][4] =3D { > - {0x1, 0x1, 0x0, 0x1}, /* 27Mhz */ > - {0x1, 0x2, 0x2, 0x1}, /* 74Mhz */ > - {0x1, 0x2, 0x2, 0x1} /* 148Mhz */ > -}; > - > static int mtk_hdmi_pll_prepare(struct clk_hw *hw) > { > struct mtk_hdmi_phy *hdmi_phy =3D to_mtk_hdmi_phy(hw); > -- > 2.26.2 >