Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   peng.fan@nxp.com
To:     shawnguo@kernel.org, s.hauer@pengutronix.de
Cc:     kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
        allison@lohutok.net, info@metux.net, Anson.Huang@nxp.com,
        leonard.crestez@nxp.com, git@andred.net, abel.vesa@nxp.com,
        andrew.smirnov@gmail.com, cphealy@gmail.com,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Peng Fan <peng.fan@nxp.com>
Subject: [PATCH V3 2/3] ARM: imx: move cpu definitions into a header
Date:   Wed, 20 May 2020 13:51:28 +0800
Message-Id: <1589953889-30955-3-git-send-email-peng.fan@nxp.com>
In-Reply-To: <1589953889-30955-1-git-send-email-peng.fan@nxp.com>
References: <1589953889-30955-1-git-send-email-peng.fan@nxp.com>
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-MessageSentRepresentingType: 1
Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0038.apcprd02.prod.outlook.com (2603:1096:3:18::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3000.31 via Frontend Transport; Wed, 20 May 2020 06:01:27 +0000
X-Mailer: git-send-email 2.7.4
X-Originating-IP: [119.31.174.66]
X-MS-PublicTrafficType: Email
X-MS-Office365-Filtering-HT: Tenant
X-MS-Office365-Filtering-Correlation-Id: 08a32479-0450-450a-9043-08d7fc833efd
X-MS-TrafficTypeDiagnostic: DB6PR0402MB2790:
X-MS-Exchange-Transport-Forked: True
X-Microsoft-Antispam-PRVS: <DB6PR0402MB2790D8F10DB95FF0CB5858D388B60@DB6PR0402MB2790.eurprd04.prod.outlook.com>
X-MS-Oob-TLC-OOBClassifiers: OLM:4941;
X-Forefront-PRVS: 04097B7F7F
X-MS-Exchange-SenderADCheck: 1
X-Microsoft-Antispam: BCL:0;
X-Microsoft-Antispam-Message-Info: OwFkwDi4b9hmfE4hToYK5FzULNMYvGmFqK6VSbtTrg0OAeqY73uNsNgC9OZON/IxkfZAXEyF8ETQOYYuilmO45bpvgeQ2mA2SemLXhbliB27zInaFIV2+J/gv6baW86zL5wtwVsAsA4rv5+7mdBLsCawhWBLawQiaMxvX1CWYeytw4VlhtjTvg7os5HCjRnCNFphcG2Wmu/IfAWOgG7lQtBBxbPgx+nzFxx7yNa/emioe71FyLzKKfU3U4s1MyousibU99mIYT3OcgAqAzUMkiMLEXFuAXV3bEtI1UDPKp3EXICY7M0MQq4kg5HvquQoIkV7ekV1S2cw5IVnJO7k2kUdbqBmbaFFMD6nlB9NSyWVWR+eyypX1UZ0I4LFXfDjAAZnAlPk9R+eJSwfIbDKE6X/xcu3qDMBprKApFe2v96OzpS19vW5UXz7cIbtL8N6sQqAPBX7dIjQ7YMeT9w2semOeSgYyBf3rD7EulQcpe0NHdH2/1rOmrtgnm6a/pIY
X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DB6PR0402MB2760.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(4636009)(396003)(376002)(366004)(136003)(346002)(39860400002)(7416002)(2906002)(16526019)(186003)(66556008)(6486002)(86362001)(956004)(66476007)(2616005)(66946007)(69590400007)(316002)(26005)(5660300002)(4326008)(8676002)(6512007)(478600001)(9686003)(36756003)(52116002)(6506007)(8936002);DIR:OUT;SFP:1101;
X-MS-Exchange-AntiSpam-MessageData: pqfMFHJn13pQlrUxFXfYRgcHe6u8rJq0coJGNI9Sx9nXmtAuznFKoqCIYKEsAMcaBrerh0Hx/zxnGr7Og0YJr1O/nsNyFdnbvOFznfiGqlznv0t2yT4DdOb6kXyBkUej4+09gvgIJHb5NWwcfno4eCUJ/gxbrm2locUGX0w/otFNisLU1ybUYHX9PC/0r8OO/QYL6w4u7DetrpZ7VCz5FDZEGjygtOUQe0+nX7YX7tHiAkw3bLd227b3OwNHUVk0iLaAjMP8ZHwmvZp67+9djL5mpp5rMEqnbnVox7C1KLWDALd4M41/qVu/7g+/CldIK2cPcyHKZlG8Jv0dXTejkA3dVAAS+xTjX+FIKU8eokPLMh88oPXb5u0qNheYOx7oRyzGALGjlgbnw33r1HDv6bk3OoDcF7Ap2HGD33G3ascVHBGC3vTgCDI2x5NcW9dqHzXrcchc2VuMxlirZMQnMqKCMtE1s/vrgr4Ec9wYGEhF/MnxNIeeGjmreaMeM5Uu
X-OriginatorOrg: nxp.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 08a32479-0450-450a-9043-08d7fc833efd
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2020 06:01:32.6813
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: MYVJCsgKRWvhswEK+hlccibCkLmkam06/adbs2/kURvr1QwAupwMOV177JQ0qPOfnUKZwV+OV+QhbjJJ3eKjug==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2790
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

From: Peng Fan <peng.fan@nxp.com>

The soc device register code will be moved to drivers/soc/imx/,
the code needs the cpu type definitions. So let's move the cpu
type definitions to a header.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/mxc.h | 28 +---------------------------
 include/soc/imx/cpu.h   | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 37 insertions(+), 27 deletions(-)
 create mode 100644 include/soc/imx/cpu.h

diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
index 48e6d781f15b..fe2d0f5abfcc 100644
--- a/arch/arm/mach-imx/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
@@ -8,41 +8,15 @@
 #define __ASM_ARCH_MXC_H__
 
 #include <linux/types.h>
+#include <soc/imx/cpu.h>
 
 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
 #error "Do not include directly."
 #endif
 
-#define MXC_CPU_MX1		1
-#define MXC_CPU_MX21		21
-#define MXC_CPU_MX25		25
-#define MXC_CPU_MX27		27
-#define MXC_CPU_MX31		31
-#define MXC_CPU_MX35		35
-#define MXC_CPU_MX51		51
-#define MXC_CPU_MX53		53
-#define MXC_CPU_IMX6SL		0x60
-#define MXC_CPU_IMX6DL		0x61
-#define MXC_CPU_IMX6SX		0x62
-#define MXC_CPU_IMX6Q		0x63
-#define MXC_CPU_IMX6UL		0x64
-#define MXC_CPU_IMX6ULL		0x65
-/* virtual cpu id for i.mx6ulz */
-#define MXC_CPU_IMX6ULZ		0x6b
-#define MXC_CPU_IMX6SLL		0x67
-#define MXC_CPU_IMX7D		0x72
-#define MXC_CPU_IMX7ULP		0xff
-
-#define MXC_CPU_VFx10		0x010
-#define MXC_CPU_VF500		0x500
-#define MXC_CPU_VF510		(MXC_CPU_VF500 | MXC_CPU_VFx10)
-#define MXC_CPU_VF600		0x600
-#define MXC_CPU_VF610		(MXC_CPU_VF600 | MXC_CPU_VFx10)
-
 #define IMX_DDR_TYPE_LPDDR2		1
 
 #ifndef __ASSEMBLY__
-extern unsigned int __mxc_cpu_type;
 
 #ifdef CONFIG_SOC_IMX6SL
 static inline bool cpu_is_imx6sl(void)
diff --git a/include/soc/imx/cpu.h b/include/soc/imx/cpu.h
new file mode 100644
index 000000000000..42d6aeb951fa
--- /dev/null
+++ b/include/soc/imx/cpu.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __IMX_CPU_H__
+#define __IMX_CPU_H__
+
+#define MXC_CPU_MX1		1
+#define MXC_CPU_MX21		21
+#define MXC_CPU_MX25		25
+#define MXC_CPU_MX27		27
+#define MXC_CPU_MX31		31
+#define MXC_CPU_MX35		35
+#define MXC_CPU_MX51		51
+#define MXC_CPU_MX53		53
+#define MXC_CPU_IMX6SL		0x60
+#define MXC_CPU_IMX6DL		0x61
+#define MXC_CPU_IMX6SX		0x62
+#define MXC_CPU_IMX6Q		0x63
+#define MXC_CPU_IMX6UL		0x64
+#define MXC_CPU_IMX6ULL		0x65
+/* virtual cpu id for i.mx6ulz */
+#define MXC_CPU_IMX6ULZ		0x6b
+#define MXC_CPU_IMX6SLL		0x67
+#define MXC_CPU_IMX7D		0x72
+#define MXC_CPU_IMX7ULP		0xff
+
+#define MXC_CPU_VFx10		0x010
+#define MXC_CPU_VF500		0x500
+#define MXC_CPU_VF510		(MXC_CPU_VF500 | MXC_CPU_VFx10)
+#define MXC_CPU_VF600		0x600
+#define MXC_CPU_VF610		(MXC_CPU_VF600 | MXC_CPU_VFx10)
+
+#ifndef __ASSEMBLY__
+extern unsigned int __mxc_cpu_type;
+#endif
+
+#endif
-- 
2.16.4