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Date:   Wed, 20 May 2020 14:32:39 -0600
From:   Rob Herring <robh@kernel.org>
To:     Xiaowei Bao <xiaowei.bao@nxp.com>
Cc:     roy.zang@nxp.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org,
        Zhiqiang.Hou@nxp.com, jingoohan1@gmail.com,
        devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com,
        Minghuan.Lian@nxp.com, mingkai.hu@nxp.com,
        linux-arm-kernel@lists.infradead.org, leoyang.li@nxp.com,
        shawnguo@kernel.org, andrew.murray@arm.com,
        linux-pci@vger.kernel.org, bhelgaas@google.com,
        lorenzo.pieralisi@arm.com, kishon@ti.com,
        linuxppc-dev@lists.ozlabs.org, amurray@thegoodpenguin.co.uk
Subject: Re: [PATCH v6 01/11] PCI: designware-ep: Add multiple PFs support
 for DWC
Message-ID: <20200520203239.GA503864@bogus>
References: <20200314033038.24844-1-xiaowei.bao@nxp.com>
 <20200314033038.24844-2-xiaowei.bao@nxp.com>
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On Sat, 14 Mar 2020 11:30:28 +0800, Xiaowei Bao wrote:
> Add multiple PFs support for DWC, due to different PF have different
> config space, we use func_conf_select callback function to access
> the different PF's config space, the different chip company need to
> implement this callback function when use the DWC IP core and intend
> to support multiple PFs feature.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> ---
> v2:
>  - Remove duplicate redundant code.
>  - Reimplement the PF config space access way.
> v3:
>  - Integrate duplicate code for func_select.
>  - Move PCIE_ATU_FUNC_NUM(pf) (pf << 20) to ((pf) << 20).
>  - Add the comments for func_conf_select function.
> v4:
>  - Correct the commit message.
> v5:
>  - No change.
> v6:
>  - No change.
> 
>  drivers/pci/controller/dwc/pcie-designware-ep.c | 123 ++++++++++++++++--------
>  drivers/pci/controller/dwc/pcie-designware.c    |  59 ++++++++----
>  drivers/pci/controller/dwc/pcie-designware.h    |  18 +++-
>  3 files changed, 142 insertions(+), 58 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>