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(Postfix) with ESMTP id 9230EAC52; Thu, 21 May 2020 10:10:17 +0000 (UTC) Subject: Re: [PATCH 1/3] arm64: dts: mt8183: Add gce setting in display node From: Matthias Brugger To: Bibby Hsieh , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org Cc: Philipp Zabel , YT Shen , Thierry Reding , CK Hu , linux-arm-kernel@lists.infradead.org, tfiga@chromium.org, drinkcat@chromium.org, linux-kernel@vger.kernel.org, srv_heupstream@mediatek.com, Yongqiang Niu References: <20200214044954.16923-1-bibby.hsieh@mediatek.com> <2369225e-2a92-c493-d089-e03f792df8cf@gmail.com> Autocrypt: addr=matthias.bgg@gmail.com; keydata= mQINBFP1zgUBEAC21D6hk7//0kOmsUrE3eZ55kjc9DmFPKIz6l4NggqwQjBNRHIMh04BbCMY fL3eT7ZsYV5nur7zctmJ+vbszoOASXUpfq8M+S5hU2w7sBaVk5rpH9yW8CUWz2+ZpQXPJcFa OhLZuSKB1F5JcvLbETRjNzNU7B3TdS2+zkgQQdEyt7Ij2HXGLJ2w+yG2GuR9/iyCJRf10Okq gTh//XESJZ8S6KlOWbLXRE+yfkKDXQx2Jr1XuVvM3zPqH5FMg8reRVFsQ+vI0b+OlyekT/Xe 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uE7i1H9r/2/UXLd+pY82zcXhFrfmKuCDmOkB5xPsOMVQJH8I0/lbqfLAqfsxSb/X1VKaP243 jzi+DzD9cvj2K6eD5j5kcKJJQactXqfJvF1Eb+OnxlB1BCLE8D1rNkPO5O742Mq3MgDmq19l +abzEL6QDAAxn9md8KwrA3RtucNh87cHlDXfUBKa7SRvBjTczDg+HEPNk2u3hrz1j3l2rliQ y1UfYx7Vk/TrdwUIJgKS8QAr8Lw9WuvY2hSqL9vEjx8VAkPWNWPwrQ== Message-ID: <77a11bb2-83a1-07b8-e949-eb9e5b37549d@gmail.com> Date: Thu, 21 May 2020 12:10:12 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <2369225e-2a92-c493-d089-e03f792df8cf@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/02/2020 11:06, Matthias Brugger wrote: > > > On 14/02/2020 05:49, Bibby Hsieh wrote: >> In order to use GCE function, we need add some information >> into display node (mboxes, mediatek,gce-client-reg, mediatek,gce-events). >> >> Signed-off-by: Bibby Hsieh >> Signed-off-by: Yongqiang Niu >> --- > > For the next time please provide some context on which patches this are based > on. Bet below the '---' with a link. > > For this time, on which patch/series is this based? :) Bibby can you please help and rebase the patch against my for-next branch [1]. I'm then happy to queue it. Not sure if we can make it for v5.8 as we are really late, but we could try :) Thanks! Matthias [1] https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/log/?h=for-next > > Thanks, > Matthias > >> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 16 ++++++++++++++++ >> 1 file changed, 16 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi >> index be4428c92f35..8b522b039a37 100644 >> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi >> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi >> @@ -9,6 +9,7 @@ >> #include >> #include >> #include >> +#include >> #include "mt8183-pinfunc.h" >> >> / { >> @@ -664,6 +665,9 @@ >> reg = <0 0x14000000 0 0x1000>; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> #clock-cells = <1>; >> + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, >> + <&gce 1 CMDQ_THR_PRIO_HIGHEST>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; >> }; >> >> ovl0: ovl@14008000 { >> @@ -672,6 +676,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_OVL0>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>; >> }; >> >> ovl_2l0: ovl@14009000 { >> @@ -680,6 +685,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>; >> }; >> >> ovl_2l1: ovl@1400a000 { >> @@ -688,6 +694,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_OVL1_2L>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>; >> }; >> >> rdma0: rdma@1400b000 { >> @@ -697,6 +704,7 @@ >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_RDMA0>; >> mediatek,rdma_fifo_size = <5120>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; >> }; >> >> rdma1: rdma@1400c000 { >> @@ -706,6 +714,7 @@ >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_RDMA1>; >> mediatek,rdma_fifo_size = <2048>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; >> }; >> >> color0: color@1400e000 { >> @@ -715,6 +724,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_COLOR0>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; >> }; >> >> ccorr0: ccorr@1400f000 { >> @@ -723,6 +733,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_CCORR0>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; >> }; >> >> aal0: aal@14010000 { >> @@ -732,6 +743,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_AAL0>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; >> }; >> >> gamma0: gamma@14011000 { >> @@ -741,6 +753,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_GAMMA0>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; >> }; >> >> dither0: dither@14012000 { >> @@ -749,6 +762,7 @@ >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> clocks = <&mmsys CLK_MM_DISP_DITHER0>; >> + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; >> }; >> >> mutex: mutex@14016000 { >> @@ -756,6 +770,8 @@ >> reg = <0 0x14016000 0 0x1000>; >> interrupts = ; >> power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; >> + mediatek,gce-events = , >> + ; >> }; >> >> smi_common: smi@14019000 { >>