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Thu, 21 May 2020 13:46:36 +0000 From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Rob Herring , Daniel Lezcano , Thomas Gleixner Cc: Damien Le Moal , Atish Patra , Alistair Francis , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH 2/5] RISC-V: Remove CLINT related code Date: Thu, 21 May 2020 19:15:41 +0530 Message-Id: <20200521134544.816918-3-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200521134544.816918-1-anup.patel@wdc.com> References: <20200521134544.816918-1-anup.patel@wdc.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: MAXPR01CA0073.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:49::15) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (106.51.30.72) by MAXPR01CA0073.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:49::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3021.23 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: DfpAGnZNOvb1/N6I0v8NrgBgNr2IFx0lb2JgREd/79h1y+JibL7+oq4IABKpvexDWitLqAtNvkCMqEuzWOGrK4/B69aPJMRzaN6r1o9EgJ2LiOGYG7MbKSP29i2IE9mg2KqeMEEpvrqgc95AnDNu26OnXv9ON6hORxtBxjuAacnMHYBiBKlyJtrQgZQWxiZe/r5ykwtKbvCJGQCWWm7QbaDVIoSe0MoKEFE2C7Dcg5Dv928eMcgBll4G28lr/iSp1pUNozxGao6a3NYVZnzk8VBy28ujLr4tbBfUgeEKUylShMTWPNqNHrYfkX2S5FEB/5w1AeTh3FyDeTi9ij0J+moP9EsiKJQzBCsFusZlEDnSXnWQieu9Xko4KXsU32oJlK2leuLYNkdjeyErKhh6imDSOrHopKUBHuxHIf4HzKVAg1ltPXtPNaSeUy7+lLtLoqI5pgc9XxKTfA5dIcvC1QAPHnp8BUhllHJ9Qx4UjJk= X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: ae2edc1b-102b-47b1-349e-08d7fd8d5be9 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 May 2020 13:46:36.0842 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tkvamQY52Qse4Di+XQczdKZn6b5KztlCNP2aCLVVu3UiSRkOSHKM2dySSZZ6/1bN4nPfwAfplsV/J86Yeyww5g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB4985 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will be having separate CLINT timer driver which will also provide CLINT based IPI operations so let's remove CLINT related code from arch/riscv directory. Signed-off-by: Anup Patel --- arch/riscv/include/asm/clint.h | 39 ------------------------------ arch/riscv/kernel/Makefile | 2 +- arch/riscv/kernel/clint.c | 44 ---------------------------------- arch/riscv/kernel/setup.c | 2 -- arch/riscv/kernel/smp.c | 1 - arch/riscv/kernel/smpboot.c | 1 - 6 files changed, 1 insertion(+), 88 deletions(-) delete mode 100644 arch/riscv/include/asm/clint.h delete mode 100644 arch/riscv/kernel/clint.c diff --git a/arch/riscv/include/asm/clint.h b/arch/riscv/include/asm/clint.h deleted file mode 100644 index a279b17a6aad..000000000000 --- a/arch/riscv/include/asm/clint.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _ASM_RISCV_CLINT_H -#define _ASM_RISCV_CLINT_H 1 - -#include -#include - -#ifdef CONFIG_RISCV_M_MODE -extern u32 __iomem *clint_ipi_base; - -void clint_init_boot_cpu(void); - -static inline void clint_send_ipi_single(unsigned long hartid) -{ - writel(1, clint_ipi_base + hartid); -} - -static inline void clint_send_ipi_mask(const struct cpumask *mask) -{ - int cpu; - - for_each_cpu(cpu, mask) - clint_send_ipi_single(cpuid_to_hartid_map(cpu)); -} - -static inline void clint_clear_ipi(unsigned long hartid) -{ - writel(0, clint_ipi_base + hartid); -} -#else /* CONFIG_RISCV_M_MODE */ -#define clint_init_boot_cpu() do { } while (0) - -/* stubs to for code is only reachable under IS_ENABLED(CONFIG_RISCV_M_MODE): */ -void clint_send_ipi_single(unsigned long hartid); -void clint_send_ipi_mask(const struct cpumask *hartid_mask); -void clint_clear_ipi(unsigned long hartid); -#endif /* CONFIG_RISCV_M_MODE */ - -#endif /* _ASM_RISCV_CLINT_H */ diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index d8bbd3207100..529cda705cfe 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -31,7 +31,7 @@ obj-y += cacheinfo.o obj-y += patch.o obj-$(CONFIG_MMU) += vdso.o vdso/ -obj-$(CONFIG_RISCV_M_MODE) += clint.o traps_misaligned.o +obj-$(CONFIG_RISCV_M_MODE) += traps_misaligned.o obj-$(CONFIG_FPU) += fpu.o obj-$(CONFIG_SMP) += smpboot.o obj-$(CONFIG_SMP) += smp.o diff --git a/arch/riscv/kernel/clint.c b/arch/riscv/kernel/clint.c deleted file mode 100644 index 3647980d14c3..000000000000 --- a/arch/riscv/kernel/clint.c +++ /dev/null @@ -1,44 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2019 Christoph Hellwig. - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * This is the layout used by the SiFive clint, which is also shared by the qemu - * virt platform, and the Kendryte KD210 at least. - */ -#define CLINT_IPI_OFF 0 -#define CLINT_TIME_CMP_OFF 0x4000 -#define CLINT_TIME_VAL_OFF 0xbff8 - -u32 __iomem *clint_ipi_base; - -void clint_init_boot_cpu(void) -{ - struct device_node *np; - void __iomem *base; - - np = of_find_compatible_node(NULL, NULL, "riscv,clint0"); - if (!np) { - panic("clint not found"); - return; - } - - base = of_iomap(np, 0); - if (!base) - panic("could not map CLINT"); - - clint_ipi_base = base + CLINT_IPI_OFF; - riscv_time_cmp = base + CLINT_TIME_CMP_OFF; - riscv_time_val = base + CLINT_TIME_VAL_OFF; - - clint_clear_ipi(boot_cpu_hartid); -} diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 145128a7e560..b07a583bf53b 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -18,7 +18,6 @@ #include #include -#include #include #include #include @@ -76,7 +75,6 @@ void __init setup_arch(char **cmdline_p) setup_bootmem(); paging_init(); unflatten_device_tree(); - clint_init_boot_cpu(); #ifdef CONFIG_SWIOTLB swiotlb_init(1); diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c index 8375cc5970f6..8a23f1eb5400 100644 --- a/arch/riscv/kernel/smp.c +++ b/arch/riscv/kernel/smp.c @@ -17,7 +17,6 @@ #include #include -#include #include #include #include diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 5fe849791bf0..a6cfa9842d4b 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include -- 2.25.1