Received: by 2002:a25:868d:0:0:0:0:0 with SMTP id z13csp1825440ybk; Thu, 21 May 2020 16:36:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxWFO4UKMPq7ADwzQBPx0TS1FrnVhEBFtZ48LDwJTtD0cZ79f/sdN0OUIXn43W4TpE5FRQk X-Received: by 2002:a17:906:24d8:: with SMTP id f24mr5652085ejb.215.1590104168968; Thu, 21 May 2020 16:36:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590104168; cv=none; d=google.com; s=arc-20160816; b=EGlvWqnxkeh+wjTYjFxHGMA94gyxqyl/Yk0pyT8UqHko1Hzk3wA4HH+btpkdPFYGH0 FVlR/2W80GETlJc5SU/YAPJ1dpFIff2U9EAxN0GD2+RlpjAbM83/714LuGhPWO0JQ0z0 bp0dIjuNQ88epIAA3IeGg4519qAGTio0Kj78rAqABxHQ5iSSaLPy1j6QcjcNTwGDv4S1 xr/yApustmlpAtLsaGKcIg2eg7wxj5ZySkcsc3gETDsNSDSpnKHXH41GyswmcOBf4hdz GOPAAZ2ofsiD2ZCJj0hFWM4DD42zP9t2vmKfFl0gwoNZE/uSg36tweW1MTLETRpP8V3m sJwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:to:dkim-signature :content-transfer-encoding:mime-version:message-id:date:subject:cc :from; bh=M6pyOSXeBOTReqc8kunREzZAoNiV34NpWkSM15LmbZE=; b=BH4c27g3CKX8y20HfHLw646tpxUrJz32RryrYXZ8cUmoqCDs3wAT2McjaNpS20sK6l 6PyKEkFyhyar0UP8YklE30s2072ch7H09Qz472cLCQPuM7ZDTkGKk8jqPzZ6pzlsilR1 G8kBAybBA1zMJfOEZbfoo4vcrmqiLOOzNix2SDhUxL+iC9jkyHN/25m1YNLj5uZ15qx6 P3FSP+/8LJODU3iaHt2w/Q6vn8fk6WgWHEMlKINHBoDj7Rk4BfY0ssOTfc3qf/5/3Za1 e3UK4imuRLqek6fdoUb6HTFXSoVqSIRNDkww9lRj6AC6ibVdt/eJ1gqcc8Ik2XU9ed8C pCrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@nvidia.com header.s=n1 header.b=aKVeXdDG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n20si3836140edb.207.2020.05.21.16.35.46; Thu, 21 May 2020 16:36:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@nvidia.com header.s=n1 header.b=aKVeXdDG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730180AbgEUXbY (ORCPT + 99 others); Thu, 21 May 2020 19:31:24 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:17646 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729726AbgEUXbY (ORCPT ); Thu, 21 May 2020 19:31:24 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 21 May 2020 16:30:04 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 21 May 2020 16:31:23 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 21 May 2020 16:31:23 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 21 May 2020 23:31:23 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 21 May 2020 23:31:23 +0000 Received: from vdumpa-ubuntu.nvidia.com (Not Verified[172.17.173.140]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 21 May 2020 16:31:23 -0700 From: Krishna Reddy CC: , , , , , , , , , , , , , , , , Krishna Reddy Subject: [PATCH v5 0/5] Nvidia Arm SMMUv2 Implementation Date: Thu, 21 May 2020 16:31:02 -0700 Message-ID: <20200521233107.11968-1-vdumpa@nvidia.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1590103804; bh=M6pyOSXeBOTReqc8kunREzZAoNiV34NpWkSM15LmbZE=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:X-NVConfidentiality:Content-Transfer-Encoding: Content-Type; b=aKVeXdDGaA5yxJZ9pHolRgPOdSbkNSWg3kK+lUBbUZhQQ8Vb9s4KmPGN9/eDyh2pn fwDfQe0yzIv0NLTsZykdKRyWp7YXPKDD9rb2BCOeMz9ZQU95HlzqW4bBv4MjjCZQeY 1AuoNyiplaMpTgMHcLGdmQIvZwp06S12ZAgkh7foMDbF0n+bKbFY049vuCdHxdDUiB Zm9ouLoxsGAurFj20nn9lIZ8ObBzDoZ115+7yTax6wXfbLZ9ooXQHifZuFA3OCdySY Rl4b0eFi+F6pYDD4heoETKWAe46D4SFwnqLowoCothFcJbF/1ZXSonGYkjp6ZaQQRr KB17wiPqbDPFg== To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes in v5: Rebased on top of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.= git next v4 - https://lkml.org/lkml/2019/10/30/1054 v3 - https://lkml.org/lkml/2019/10/18/1601 v2 - https://lkml.org/lkml/2019/9/2/980 v1 - https://lkml.org/lkml/2019/8/29/1588 Krishna Reddy (5): iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage dt-bindings: arm-smmu: Add binding for Tegra194 SMMU iommu/arm-smmu: Add global/context fault implementation hooks arm64: tegra: Add DT node for T194 SMMU arm64: tegra: enable SMMU for SDHCI and EQOS on T194 .../devicetree/bindings/iommu/arm,smmu.yaml | 5 + MAINTAINERS | 2 + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 81 ++++++ drivers/iommu/Makefile | 2 +- drivers/iommu/arm-smmu-impl.c | 3 + drivers/iommu/arm-smmu-nvidia.c | 261 ++++++++++++++++++ drivers/iommu/arm-smmu.c | 11 +- drivers/iommu/arm-smmu.h | 4 + 8 files changed, 366 insertions(+), 3 deletions(-) create mode 100644 drivers/iommu/arm-smmu-nvidia.c base-commit: 365f8d504da50feaebf826d180113529c9383670 --=20 2.26.2