Received: by 2002:a25:1104:0:0:0:0:0 with SMTP id 4csp93090ybr; Fri, 22 May 2020 01:42:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwB4OIy9G7GVBEwKEEszalb9PLHDz6gmFWkyuqyc38GRG7uL5cPChO6gxNXgPul4mJkRw1M X-Received: by 2002:a17:906:2c03:: with SMTP id e3mr6922062ejh.206.1590136940896; Fri, 22 May 2020 01:42:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590136940; cv=none; d=google.com; s=arc-20160816; b=NNO7zY2CdLQwG0DpVkMa7wLk/QcX8M2tp3PkkziUQoIYxHA2cL3v2wTT271duu11X6 hmzE46zqtMjady+BxKjV1zhUewAmKeVg9++fkhhIXJLbLhicoRnD0zhLcCjWW5/zsEhi YLWki3FebBnivLtyg8F5o3I9JumaXusNkXPTRP8XkIlU9EAKZL1BZoWMcR5ST/J86tNt Cex0c86G5zEga2MkFBLCTC5f3yJKcA+VccxTc5g02cNrMeflUIHTm0I4ROBamvCuwavD +pwRCxJ14twlTXOIM7q9MVbN+Fe2xe6Jz7JeXAdVTYDdnnUlAiBl/LPaj2bx0h2dvA54 cNTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=yF4xwwVycaty1YYtrvz7tn0azR2eb+OYgNKHjKytnkc=; b=otqO0nlGk+lT35eDd4tHR0hIR0N+nq/OvPG/mavr/XMAAXBmbQ1pHksjw3z/0mr9Cb /WQ9Or0/dQryBMj70pc4lKNr84pfbRQ4x/StfeE0KrtfYOJ7f7/FlR13QsjMwR4EprQI jjJ0NuUXe9YfJtFxnu8tHi4o4a7teHUgdn8LOY9RwuIKz3j5Dc/vfYY/DaCk3LMvnHR7 xlqLC/HmcMoy3Ojd/g3qFgdwyatryfrdTe6Jp5vuXY0/eeM2+gaOH5hNxEDJsl59iHP3 wOKvgXub407Iao6cnr0mpKqX5VJEP/aY1zn66ZYVr747hE9B/PWUyImCFZFViReHJSpE iLrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LCwSPwdX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l8si4175369eds.308.2020.05.22.01.41.57; Fri, 22 May 2020 01:42:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LCwSPwdX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729763AbgEVIiI (ORCPT + 99 others); Fri, 22 May 2020 04:38:08 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:50460 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729746AbgEVIiD (ORCPT ); Fri, 22 May 2020 04:38:03 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 04M8bcmh118407; Fri, 22 May 2020 03:37:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1590136658; bh=yF4xwwVycaty1YYtrvz7tn0azR2eb+OYgNKHjKytnkc=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=LCwSPwdXFLyyOmJwtl+CdoShpJ5fp9tEao2X9/zf2kbnHkrfB6daeZc+naZsHvv10 kiw+7ivb0aZ9ids8iQc7RtWrDqU/qMfeuR0E1icglIzgqW8EySon+4xkhX8cnKfZl5 zCPoF810ubD13ZCtI79ERZZo13Wjwa8lPZlnB+gI= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 04M8bc0U071990 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 May 2020 03:37:38 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 22 May 2020 03:37:38 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 22 May 2020 03:37:38 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04M8baqV054658; Fri, 22 May 2020 03:37:37 -0500 Date: Fri, 22 May 2020 14:07:36 +0530 From: Pratyush Yadav To: CC: Alexandre Belloni , Boris Brezillon , Mark Brown , , , , , , Ludovic Desroches , Matthias Brugger , Miquel Raynal , Nicolas Ferre , Sekhar Nori , Richard Weinberger , Tudor Ambarus , Vignesh Raghavendra , Subject: Re: [PATCH v5 05/19] mtd: spi-nor: add support for DTR protocol Message-ID: <20200522083734.hs4wmfplch7icecv@ti.com> References: <20200519142642.24131-1-p.yadav@ti.com> <20200519142642.24131-6-p.yadav@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/05/20 02:30PM, masonccyang@mxic.com.tw wrote: > > Hi Pratyush, > > > > +/** > > + * spi_nor_spimem_setup_op() - Set up common properties of a spi-mem > op. > > + * @nor: pointer to a 'struct spi_nor' > > + * @op: pointer to the 'struct spi_mem_op' whose properties > > + * need to be initialized. > > + * @proto: the protocol from which the properties need to be set. > > + */ > > +void spi_nor_spimem_setup_op(const struct spi_nor *nor, > > + struct spi_mem_op *op, > > + const enum spi_nor_protocol proto) > > +{ > > + u8 ext; > > + > > + op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(proto); > > + > > + if (op->addr.nbytes) > > + op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto); > > + > > + if (op->dummy.nbytes) > > + op->dummy.buswidth = spi_nor_get_protocol_addr_nbits(proto); > > + > > + if (op->data.nbytes) > > + op->data.buswidth = spi_nor_get_protocol_data_nbits(proto); > > + > > + if (spi_nor_protocol_is_dtr(proto)) { > > As mentioned before that I am also patching mx25* which supports 8S-8S-8S > and > 8D-8D-8D mode. > > please patch to spi_nor_protocol_is_8_8_8(proto) for 8S-8S-8S mode > support. Like I said before, we should try to avoid creeping up the scope of this series. This series aims to add 8D support. Once this lands, I don't see why you can't 8S support on top. Unless we make a fundamental change that makes it impossible to add 8S support, it should stay as-is. All that said, I fail to see why 8S would have any problems with this function. We just fill in the buswidths from the protocol, and adjust the op if it is DTR. So in case of 8S mode, this function as it is will fill in the buswidths to 8 for all phases. And it won't hit the if block here so this code is of no concern to 8S mode. > > + /* > > + * spi-mem supports mixed DTR modes, but right now we can only > > + * have all phases either DTR or STR. IOW, spi-mem can have > > + * something like 4S-4D-4D, but spi-nor can't. So, set all 4 > > + * phases to either DTR or STR. > > + */ > > if (spi_nor_protocol_is_8D_8D_8D(proto) { No. The adjustments below apply to _all_ DTR ops, not just 8D-8D-8D ones. So in case someone wants to use 4D-4D-4D mode, they won't have to touch this code at all. > > + op->cmd.dtr = op->addr.dtr = op->dummy.dtr > > + = op->data.dtr = true; > > + > > + /* 2 bytes per clock cycle in DTR mode. */ > > + op->dummy.nbytes *= 2; > > } > > > + > > + ext = spi_nor_get_cmd_ext(nor, op); > > + op->cmd.opcode = (op->cmd.opcode << 8) | ext; > > + op->cmd.nbytes = 2; > > + } > > +} > > + -- Regards, Pratyush Yadav Texas Instruments India