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Date:   Sat, 23 May 2020 23:32:35 +0200
From:   Peter Zijlstra <peterz@infradead.org>
To:     Andy Lutomirski <luto@kernel.org>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        LKML <linux-kernel@vger.kernel.org>, X86 ML <x86@kernel.org>
Subject: Re: [RFC][PATCH 0/4] x86/entry: disallow #DB more
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On Sat, May 23, 2020 at 02:59:40PM +0200, Peter Zijlstra wrote:
> On Fri, May 22, 2020 at 03:13:57PM -0700, Andy Lutomirski wrote:

> > This is great, except that the unconditional DR7 write is going to
> > seriously hurt perf performance.  Fortunately, no one cares about
> > perf, right? :)
> 
> Good point, so the trivial optimization is below. I couldn't find
> instruction latency numbers for DRn load/stores anywhere. I'm hoping
> loads are cheap.

+	u64 empty = 0, read = 0, write = 0;
+	unsigned long dr7;
+
+	for (i=0; i<100; i++) {
+		u64 s;
+
+		s = rdtsc();
+		barrier_nospec();
+		barrier_nospec();
+		empty += rdtsc() - s;
+
+		s = rdtsc();
+		barrier_nospec();
+		dr7 = native_get_debugreg(7);
+		barrier_nospec();
+		read += rdtsc() - s;
+
+		s = rdtsc();
+		barrier_nospec();
+		native_set_debugreg(7, 0);
+		barrier_nospec();
+		write += rdtsc() - s;
+	}
+
+	printk("XXX: %ld %ld %ld\n", empty, read, write);


[    1.628125] XXX: 2800 2404 19600

IOW, reading DR7 is basically free, and certainly cheaper than looking
at cpu_dr7 which would probably be an insta cache miss.

Which seems to suggest KVM can go pound sand. Maybe they can fix
themselves with some paravirt love.