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[23.128.96.18]) by mx.google.com with ESMTP id a16si7412191ejs.58.2020.05.24.02.14.58; Sun, 24 May 2020 02:15:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728860AbgEXJMR (ORCPT + 99 others); Sun, 24 May 2020 05:12:17 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:48937 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728252AbgEXJMR (ORCPT ); Sun, 24 May 2020 05:12:17 -0400 X-Originating-IP: 90.112.45.105 Received: from localhost.localdomain (lfbn-gre-1-325-105.w90-112.abo.wanadoo.fr [90.112.45.105]) (Authenticated sender: alex@ghiti.fr) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 0F5F320002; Sun, 24 May 2020 09:12:13 +0000 (UTC) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Zong Li , Anup Patel , Christoph Hellwig , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti , Palmer Dabbelt Subject: [PATCH 2/8] riscv: Allow to dynamically define VA_BITS Date: Sun, 24 May 2020 05:10:02 -0400 Message-Id: <20200524091008.25587-3-alex@ghiti.fr> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200524091008.25587-1-alex@ghiti.fr> References: <20200524091008.25587-1-alex@ghiti.fr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With 4-level page table folding at runtime, we don't know at compile time the size of the virtual address space so we must set VA_BITS dynamically so that sparsemem reserves the right amount of memory for struct pages. Signed-off-by: Alexandre Ghiti Reviewed-by: Anup Patel Reviewed-by: Palmer Dabbelt --- arch/riscv/Kconfig | 10 ---------- arch/riscv/include/asm/pgtable.h | 12 ++++++++++-- arch/riscv/include/asm/sparsemem.h | 2 +- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 93127d5913fe..64b25a90d60f 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -101,16 +101,6 @@ config ZONE_DMA32 bool default y if 64BIT -config VA_BITS - int - default 32 if 32BIT - default 39 if 64BIT - -config PA_BITS - int - default 34 if 32BIT - default 56 if 64BIT - config PAGE_OFFSET hex default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 25213cfaf680..8e96315b3366 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -41,7 +41,7 @@ * position vmemmap directly below the VMALLOC region. */ #define VMEMMAP_SHIFT \ - (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) + (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) #define VMEMMAP_END (VMALLOC_START - 1) #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) @@ -80,6 +80,14 @@ #endif /* CONFIG_64BIT */ #ifdef CONFIG_MMU +#ifdef CONFIG_64BIT +#define VA_BITS 39 +#define PA_BITS 56 +#else +#define VA_BITS 32 +#define PA_BITS 34 +#endif + /* Number of entries in the page global directory */ #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) /* Number of entries in the page table */ @@ -466,7 +474,7 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma, * and give the kernel the other (upper) half. */ #ifdef CONFIG_64BIT -#define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE) +#define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE) #else #define KERN_VIRT_START FIXADDR_START #endif diff --git a/arch/riscv/include/asm/sparsemem.h b/arch/riscv/include/asm/sparsemem.h index 45a7018a8118..f08d72155bc8 100644 --- a/arch/riscv/include/asm/sparsemem.h +++ b/arch/riscv/include/asm/sparsemem.h @@ -4,7 +4,7 @@ #define _ASM_RISCV_SPARSEMEM_H #ifdef CONFIG_SPARSEMEM -#define MAX_PHYSMEM_BITS CONFIG_PA_BITS +#define MAX_PHYSMEM_BITS PA_BITS #define SECTION_SIZE_BITS 27 #endif /* CONFIG_SPARSEMEM */ -- 2.20.1