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From:   Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon, 25 May 2020 17:30:59 +0200
Message-ID: <CAKMK7uHXjFcVZuV-gF-mGYZVG8CbosoxWKN5MKV+rBXwEr3JZw@mail.gmail.com>
Subject: Re: [RFC 08/17] drm/scheduler: use dma-fence annotations in main thread
To:     DRI Development <dri-devel@lists.freedesktop.org>,
        Lucas Stach <l.stach@pengutronix.de>,
        Christian Gmeiner <christian.gmeiner@gmail.com>,
        Qiang Yu <yuq825@gmail.com>, Rob Herring <robh@kernel.org>,
        Tomeu Vizoso <tomeu.vizoso@collabora.com>,
        Steven Price <Steven.Price@arm.com>,
        Alyssa Rosenzweig <alyssa@rosenzweig.io>,
        "Anholt, Eric" <eric@anholt.net>
Cc:     LKML <linux-kernel@vger.kernel.org>,
        "open list:DMA BUFFER SHARING FRAMEWORK" 
        <linux-media@vger.kernel.org>,
        "moderated list:DMA BUFFER SHARING FRAMEWORK" 
        <linaro-mm-sig@lists.linaro.org>,
        linux-rdma <linux-rdma@vger.kernel.org>,
        amd-gfx list <amd-gfx@lists.freedesktop.org>,
        intel-gfx <intel-gfx@lists.freedesktop.org>,
        Chris Wilson <chris@chris-wilson.co.uk>,
        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        =?UTF-8?Q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>,
        Daniel Vetter <daniel.vetter@intel.com>
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On Tue, May 12, 2020 at 11:00 AM Daniel Vetter <daniel.vetter@ffwll.ch> wro=
te:
>
> If the scheduler rt thread gets stuck on a mutex that we're holding
> while waiting for gpu workloads to complete, we have a problem.
>
> Add dma-fence annotations so that lockdep can check this for us.
>
> I've tried to quite carefully review this, and I think it's at the
> right spot. But obviosly no expert on drm scheduler.
>
> Cc: linux-media@vger.kernel.org
> Cc: linaro-mm-sig@lists.linaro.org
> Cc: linux-rdma@vger.kernel.org
> Cc: amd-gfx@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Christian K=C3=B6nig <christian.koenig@amd.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

Adding a bunch more people from drivers using the drm/scheduler (so
that's maintainers for etnaviv, lima, panfrost, and v3d on top of
amdgpu folks arlready on cc). Any takes or testing on this and well
the entire series very much appreciated, there's also another patch to
anotate the tdr work in this series. Plus ofc the prep work.

Thanks, Daniel

> ---
>  drivers/gpu/drm/scheduler/sched_main.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/sch=
eduler/sched_main.c
> index 2f319102ae9f..06a736e506ad 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -763,9 +763,12 @@ static int drm_sched_main(void *param)
>         struct sched_param sparam =3D {.sched_priority =3D 1};
>         struct drm_gpu_scheduler *sched =3D (struct drm_gpu_scheduler *)p=
aram;
>         int r;
> +       bool fence_cookie;
>
>         sched_setscheduler(current, SCHED_FIFO, &sparam);
>
> +       fence_cookie =3D dma_fence_begin_signalling();
> +
>         while (!kthread_should_stop()) {
>                 struct drm_sched_entity *entity =3D NULL;
>                 struct drm_sched_fence *s_fence;
> @@ -823,6 +826,9 @@ static int drm_sched_main(void *param)
>
>                 wake_up(&sched->job_scheduled);
>         }
> +
> +       dma_fence_end_signalling(fence_cookie);
> +
>         return 0;
>  }
>
> --
> 2.26.2
>


--=20
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch