Received: by 2002:a25:ef43:0:0:0:0:0 with SMTP id w3csp58330ybm; Tue, 26 May 2020 10:39:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxdt3kQBmQoK8XyGjfH9soxuAbxhEhZp3dTD8Tk284foSFqmbvga4xh22Jh8h79TjHOleAS X-Received: by 2002:a50:d7d1:: with SMTP id m17mr8434177edj.126.1590514783514; Tue, 26 May 2020 10:39:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590514783; cv=none; d=google.com; s=arc-20160816; b=rvqWCVpuOyJtWlVfbNy8kQbZemkbUlDcmDDSKslnrJXBN5ZmLPIMjljKhogwHTvG6F 4tOfZdP+gtKtdUvD57APOhmNzdT1ffrXzsBMXxFIm+SXE1gXQ5gqpdaG50NuMcqexU5K jlahykdr1Mo+xzdTMUcvzyK7gcvF/7Xa+v5lU1OKh9+sNzsrw/QIVEjNHK/L8apMNNRO 5kooXO4Vor2xNsa5wqyHxP7jLUR0dtQG3boe9LAq2e1IJKXdFyX8O4szw/1PAubwTd31 c8eTAmpAFGudwUd4PWIGI6WmpjQGjr8zdOGyPX4bXTBMO2e8pjqL6rGUsER2mdXJuzkJ LMbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from; bh=nZL28cy0iBhs/GZhwn5TK7u3UzVykU6FHBwk0hh+IiE=; b=bjcKW8QEV1+4bb0J4ONdeeSSs0Vvedsv3gOO9OqxkuashiXJNO/HSW/NMGEFWz69kR SD17TaWr7FiHEwYdv+DDzA0t9DX2wFDyz6vFjP9FWMhLHBGGDr0dmS1Fb0NJ/N/Z2plx OI1d5wDPpDll3BIk9FsOH14y8fqQVeMjShZm0phlpS3qApZcTWjC9DC8XvYu/MIlcd6g K1g5wnLyXyMK+jqqq+xDTmyjbYPeEae4ZAP/EUy+Y1wAJQMT8B7XLVb8R1+gGAtUeD3I tQENKc7Jman0Y1+MYrSgWnel7c0i6Ow0OjKm4FTNHbZf6zJKIoRIWj1nxHfTcVkdKABb WJRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s22si63317edx.32.2020.05.26.10.39.20; Tue, 26 May 2020 10:39:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389430AbgEZRgO (ORCPT + 99 others); Tue, 26 May 2020 13:36:14 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:65094 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728339AbgEZRfO (ORCPT ); Tue, 26 May 2020 13:35:14 -0400 Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 26 May 2020 10:35:13 -0700 Received: from gurus-linux.qualcomm.com ([10.46.162.81]) by ironmsg05-sd.qualcomm.com with ESMTP; 26 May 2020 10:35:13 -0700 Received: by gurus-linux.qualcomm.com (Postfix, from userid 383780) id 8C68B4C99; Tue, 26 May 2020 10:35:13 -0700 (PDT) From: Guru Das Srinagesh To: linux-pwm@vger.kernel.org, Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: Subbaraman Narayanamurthy , David Collins , linux-kernel@vger.kernel.org, Joe Perches , Stephen Boyd , Lee Jones , Arnd Bergmann , Geert Uytterhoeven , Guenter Roeck , Daniel Thompson , Dan Carpenter , linux-arm-kernel@lists.infradead.org, Guru Das Srinagesh Subject: [PATCH v15 07/11] pwm: sifive: Use 64-bit division macro Date: Tue, 26 May 2020 10:35:07 -0700 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using DIV64_U64_ROUND_CLOSEST to handle a 64-bit divisor. Signed-off-by: Guru Das Srinagesh Acked-by: Palmer Dabbelt --- drivers/pwm/pwm-sifive.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index cc63f9b..62de0bb 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -181,7 +181,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, * consecutively */ num = (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH); - frac = DIV_ROUND_CLOSEST_ULL(num, state->period); + frac = DIV64_U64_ROUND_CLOSEST(num, state->period); /* The hardware cannot generate a 100% duty cycle */ frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project